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Subject: Re: [PATCH v5 00/11] RISC-V: Probe DT extension support using
 riscv,isa-extensions & riscv,isa-base
From:   patchwork-bot+linux-riscv@kernel.org
Message-Id: <169159082335.5601.13810785902879648545.git-patchwork-notify@kernel.org>
Date:   Wed, 09 Aug 2023 14:20:23 +0000
References: <20230713-target-much-8ac624e90df8@wendy>
In-Reply-To: <20230713-target-much-8ac624e90df8@wendy>
To:     Conor Dooley <conor.dooley@microchip.com>
Cc:     linux-riscv@lists.infradead.org, palmer@dabbelt.com,
        devicetree@vger.kernel.org, aou@eecs.berkeley.edu, corbet@lwn.net,
        linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
        conor@kernel.org, robh+dt@kernel.org, evan@rivosinc.com,
        krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com,
        heiko.stuebner@vrull.eu, ajones@ventanamicro.com
Precedence: bulk

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Thu, 13 Jul 2023 13:10:58 +0100 you wrote:
> Hey,
> 
> Based on my latest iteration of deprecating riscv,isa [1], here's an
> implementation of the new properties for Linux. The first few patches,
> up to "RISC-V: split riscv_fill_hwcap() in 3", are all prep work that
> further tames some of the extension related code, on top of my already
> applied series that cleans up the ISA string parser.
> Perhaps "RISC-V: shunt isa_ext_arr to cpufeature.c" is a bit gratuitous,
> but I figured a bit of coalescing of extension related data structures
> would be a good idea. Note that riscv,isa will still be used in the
> absence of the new properties. Palmer suggested adding a Kconfig option
> to turn off the fallback for DT, which I have gone and done. It's locked
> behind the NONPORTABLE option for good reason.
> 
> [...]

Here is the summary with links:
  - [v5,01/11] RISC-V: Provide a more helpful error message on invalid ISA strings
    https://git.kernel.org/riscv/c/230598939678
  - [v5,02/11] RISC-V: don't parse dt/acpi isa string to get rv32/rv64
    https://git.kernel.org/riscv/c/67270fb388fe
  - [v5,03/11] RISC-V: drop a needless check in print_isa_ext()
    https://git.kernel.org/riscv/c/131033689da2
  - [v5,04/11] RISC-V: shunt isa_ext_arr to cpufeature.c
    https://git.kernel.org/riscv/c/8135ade32c0d
  - [v5,05/11] RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap()
    https://git.kernel.org/riscv/c/37f988dcec05
  - [v5,06/11] RISC-V: add missing single letter extension definitions
    https://git.kernel.org/riscv/c/c30556e318cc
  - [v5,07/11] RISC-V: add single letter extensions to riscv_isa_ext
    https://git.kernel.org/riscv/c/effc122ad176
  - [v5,08/11] RISC-V: split riscv_fill_hwcap() in 3
    https://git.kernel.org/riscv/c/4265b0ec5ee7
  - [v5,09/11] RISC-V: enable extension detection from dedicated properties
    https://git.kernel.org/riscv/c/90700a4fbfaf
  - [v5,10/11] RISC-V: try new extension properties in of_early_processor_hartid()
    https://git.kernel.org/riscv/c/c98f136aedbd
  - [v5,11/11] RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa"
    https://git.kernel.org/riscv/c/496ea826d1e1

You are awesome, thank you!
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