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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Aug 2023 16:29:18.9903 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d756f3cd-71eb-4fc2-f7fa-08db98f5c7e9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00026367.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9419 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The BlueField has internal registers to store the ARM boot states. Support setting the BlueField ARM boot state to "OS up". Signed-off-by: Asmaa Mnebhi Reviewed-by: Vadim Pasternak --- v1->v2: - No changes made to this patch. It has already been approved. This is just to update [PATCH v2 1/2] drivers/platform/mellanox/mlxbf-bootctl.c | 25 +++++++++++++++++++++++ drivers/platform/mellanox/mlxbf-bootctl.h | 5 +++++ 2 files changed, 30 insertions(+) diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c index 52d1272478a4..0bf29eee1e70 100644 --- a/drivers/platform/mellanox/mlxbf-bootctl.c +++ b/drivers/platform/mellanox/mlxbf-bootctl.c @@ -80,6 +80,7 @@ static const char * const mlxbf_rsh_log_level[] = { "INFO", "WARN", "ERR", "ASSERT"}; static DEFINE_MUTEX(icm_ops_lock); +static DEFINE_MUTEX(os_up_lock); /* ARM SMC call which is atomic and no need for lock. */ static int mlxbf_bootctl_smc(unsigned int smc_op, int smc_arg) @@ -431,6 +432,28 @@ static ssize_t large_icm_store(struct device *dev, return res.a0 ? -EPERM : count; } +static ssize_t os_up_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct arm_smccc_res res; + unsigned long val; + int err; + + err = kstrtoul(buf, 10, &val); + if (err) + return err; + + if (val != 1) + return -EINVAL; + + mutex_lock(&os_up_lock); + arm_smccc_smc(MLNX_HANDLE_OS_UP, 0, 0, 0, 0, 0, 0, 0, &res); + mutex_unlock(&os_up_lock); + + return count; +} + static DEVICE_ATTR_RW(post_reset_wdog); static DEVICE_ATTR_RW(reset_action); static DEVICE_ATTR_RW(second_reset_action); @@ -439,6 +462,7 @@ static DEVICE_ATTR_RO(secure_boot_fuse_state); static DEVICE_ATTR_WO(fw_reset); static DEVICE_ATTR_WO(rsh_log); static DEVICE_ATTR_RW(large_icm); +static DEVICE_ATTR_WO(os_up); static struct attribute *mlxbf_bootctl_attrs[] = { &dev_attr_post_reset_wdog.attr, @@ -449,6 +473,7 @@ static struct attribute *mlxbf_bootctl_attrs[] = { &dev_attr_fw_reset.attr, &dev_attr_rsh_log.attr, &dev_attr_large_icm.attr, + &dev_attr_os_up.attr, NULL }; diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h index fc5019c90fc5..613963d448f2 100644 --- a/drivers/platform/mellanox/mlxbf-bootctl.h +++ b/drivers/platform/mellanox/mlxbf-bootctl.h @@ -90,6 +90,11 @@ #define MAX_ICM_BUFFER_SIZE 10 +/* + * SMC function ID to set the ARM boot state to up + */ +#define MLNX_HANDLE_OS_UP 0x82000014 + /* SMC function IDs for SiP Service queries */ #define MLXBF_BOOTCTL_SIP_SVC_CALL_COUNT 0x8200ff00 #define MLXBF_BOOTCTL_SIP_SVC_UID 0x8200ff01 -- 2.30.1