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[72.194.116.95]) by smtp.gmail.com with ESMTPSA id c29-20020ac86e9d000000b003ef2db16e72sm4164552qtv.94.2023.08.09.10.04.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Aug 2023 10:04:35 -0700 (PDT) Message-ID: <6b738510-bda4-1517-20aa-135566bb98be@gmail.com> Date: Wed, 9 Aug 2023 10:04:31 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] net: phy: Don't disable irqs on shutdown if WoL is enabled Content-Language: en-US To: Andrew Lunn , "Russell King (Oracle)" Cc: Ioana Ciornei , Jakub Kicinski , Heiner Kallweit , =?UTF-8?B?VXdlIEtsZWluZS1L4pScw4JuaWc=?= , Ioana Ciornei , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandru Ardelean , Andre Edich , Antoine Tenart , Baruch Siach , Christophe Leroy , Divya Koppera , Hauke Mehrtens , Jerome Brunet , Kavya Sree Kotagiri , Linus Walleij , Marco Felsch , Marek Vasut , Martin Blumenstingl , Mathias Kresin , Maxim Kochetkov , Michael Walle , Neil Armstrong , Nisar Sayed , Oleksij Rempel , Philippe Schenker , Willy Liu , Yuiko Oshino References: <20230804071757.383971-1-u.kleine-koenig@pengutronix.de> <20230808145325.343c5098@kernel.org> <1e438a02-6964-ce65-5584-e8ea57a694bb@gmail.com> <20230809142155.4dtmnmmecaycbtum@LXL00007.wbi.nxp.com> <20230809154418.hjkf43ndwfzretiy@LXL00007.wbi.nxp.com> <2f717c52-0ae5-4702-ab34-7ce0bffe8c86@lunn.ch> From: Florian Fainelli In-Reply-To: <2f717c52-0ae5-4702-ab34-7ce0bffe8c86@lunn.ch> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8/9/2023 9:21 AM, Andrew Lunn wrote: >> Thinking about this, I wonder whether we could solve your issue by >> disabling interrupts when the PHY is probed, rather than disabling >> them on shutdown - something like this? (not build tested) >> >> diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c >> index 3e9909b30938..4d1a37487923 100644 >> --- a/drivers/net/phy/phy_device.c >> +++ b/drivers/net/phy/phy_device.c >> @@ -3216,6 +3216,8 @@ static int phy_probe(struct device *dev) >> goto out; >> } >> >> + phy_disable_interrupts(phydev); >> + >> /* Start out supporting everything. Eventually, >> * a controller will attach, and may modify one >> * or both of these values > > At some point, the interrupt is going to be enabled again. And then > the WoL interrupt will fire. I think some PHY drivers actually need to > see that WoL interrupt. e.g. the marvell driver has this comment: > > static int m88e1318_set_wol(struct phy_device *phydev, > struct ethtool_wolinfo *wol) > { > .... > /* If WOL event happened once, the LED[2] interrupt pin > * will not be cleared unless we reading the interrupt status > * register. If interrupts are in use, the normal interrupt > * handling will clear the WOL event. Clear the WOL event > * before enabling it if !phy_interrupt_is_valid() > */ > > So it seems like just probing the marvell PHY is not enough to clear > the WoL interrupt. > > Can we be sure that the other PHY has reached a state it can handle > and clear an interrupt when we come to enable the interrupt? I think > not, especially in cases like NFS root, where the interface will be > put into use as soon as it exists, maybe before the other interface > has probed. Does it really make sense to have the PHY be interrupt driven for this specific board configuration if this causes so much hassle? -- Florian