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[2620:137:e000::1:20]) by mx.google.com with ESMTP id t7-20020a170906268700b0098e3698905fsi9390263ejc.625.2023.08.09.11.27.42; Wed, 09 Aug 2023 11:28:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=KmMarAiw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232505AbjHIRkD (ORCPT + 99 others); Wed, 9 Aug 2023 13:40:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231200AbjHIRkD (ORCPT ); Wed, 9 Aug 2023 13:40:03 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E5E51FF5; Wed, 9 Aug 2023 10:40:00 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 379HdtMQ044805; Wed, 9 Aug 2023 12:39:55 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691602795; bh=4BVCnsWV2uQIJWu08jQ73ZLyySRe8TMLqGvLEync3VU=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=KmMarAiwoBBe0noSz0+NuEhHHQOuRlc9+YRSiBXIm3JhvBEbzmii0A273v/hFignB 5oKiOusl4Q1/zWReE64Qwx0117rBYwP/y8xyD73rRTl4SkcGPqM2h8uYrDSfNFp5RN Tw0w0aUoDcqm7t5S30Z6/OA5boMitWxGtJoS8L2k= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 379Hdtsc097302 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Aug 2023 12:39:55 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Aug 2023 12:39:54 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 12:39:54 -0500 Received: from [10.249.132.69] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379Hdng3002868; Wed, 9 Aug 2023 12:39:50 -0500 Message-ID: <28cf3fa3-c9ea-aba1-2e45-94142a818849@ti.com> Date: Wed, 9 Aug 2023 23:09:49 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,dss-oldi-io-ctrl compatible To: Andrew Davis , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: , , References: <20230809165752.46133-1-afd@ti.com> Content-Language: en-US From: Aradhya Bhatia In-Reply-To: <20230809165752.46133-1-afd@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Andrew, Thank you for quickly whipping up these patches! =) On 09-Aug-23 22:27, Andrew Davis wrote: > Add TI DSS OLDI-IO control registers compatible. This is a region of 5 > 32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They > are used to control the characteristics of the OLDI DATA/CLK IO as needed > by the DSS display controller node. As long as the driver takes care of it, we can reuse the same compatible even when OLDI IO Ctrl registers change from SoC to SoC, (in this case, AM65 to AM62), right? Regards Aradhya > > [0] https://www.ti.com/lit/pdf/spruid7 > > Signed-off-by: Andrew Davis > --- > Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > index 8103154bbb529..5029abd6d6411 100644 > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > @@ -69,6 +69,7 @@ properties: > - rockchip,rk3588-qos > - rockchip,rv1126-qos > - starfive,jh7100-sysmain > + - ti,dss-oldi-io-ctrl > > - const: syscon >