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References: <20230618132235.728641-1-niravkumar.l.rabara@intel.com> <20230801010234.792557-1-niravkumar.l.rabara@intel.com> <20230801010234.792557-5-niravkumar.l.rabara@intel.com> <4c0dfd1c-2b61-b954-73ad-ac8d4b82487d@kernel.org>
Subject: Re: [PATCH v2 4/5] clk: socfpga: agilex: add clock driver for the Agilex5
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     adrian.ho.yin.ng@intel.com, andrew@lunn.ch, conor+dt@kernel.org,
        devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        mturquette@baylibre.com, netdev@vger.kernel.org,
        p.zabel@pengutronix.de, richardcochran@gmail.com,
        robh+dt@kernel.org, wen.ping.teh@intel.com
To:     Dinh Nguyen <dinguyen@kernel.org>, niravkumar.l.rabara@intel.com
Date:   Wed, 09 Aug 2023 14:28:11 -0700
User-Agent: alot/0.10
Precedence: bulk

Quoting Dinh Nguyen (2023-08-08 04:03:47)
> Hi Stephen/Mike,
>=20
> On 7/31/23 20:02, niravkumar.l.rabara@intel.com wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> >=20
> > Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
> > driver for the Agilex5 is very similar to the Agilex platform,we can
> > re-use most of the Agilex clock driver.
> >=20
> > Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com>
> > Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> > ---
> >   drivers/clk/socfpga/clk-agilex.c | 433 ++++++++++++++++++++++++++++++-
> >   1 file changed, 431 insertions(+), 2 deletions(-)
> >=20
>=20
> If you're ok with this patch, can I take this through armsoc?
>=20

Usually any binding files go through arm-soc and clk tree but the driver
only goes through clk tree via a PR. Is that possible here?