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References: <20230808033130.2226-1-Wenhua.Lin@unisoc.com> <4bfc8ac2-f253-ab4d-3d44-2cbd62dce20f@linux.alibaba.com>
In-Reply-To: <4bfc8ac2-f253-ab4d-3d44-2cbd62dce20f@linux.alibaba.com>
From:   wenhua lin <wenhua.lin1994@gmail.com>
Date:   Thu, 10 Aug 2023 15:04:59 +0800
Message-ID: <CAB9BWheMads8HGAE=B4Lm=UTYQ161GQ31BH1PvnG7y-2L9Vr8A@mail.gmail.com>
Subject: Re: [PATCH 2/3] gpio: sprd: In the sleep state, the eic dbnc clk must
 be forced open
To:     Baolin Wang <baolin.wang@linux.alibaba.com>
Cc:     Wenhua Lin <Wenhua.Lin@unisoc.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Andy Shevchenko <andy@kernel.org>,
        Orson Zhai <orsonzhai@gmail.com>,
        Chunyan Zhang <zhang.lyra@gmail.com>,
        linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org,
        Xiongpeng Wu <xiongpeng.wu@unisoc.com>
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On Wed, Aug 9, 2023 at 9:29=E2=80=AFAM Baolin Wang
<baolin.wang@linux.alibaba.com> wrote:
>
>
>
> On 8/8/2023 11:31 AM, Wenhua Lin wrote:
> > In the sleep state, Eic dbnc has no clock and the clk enable
> > of dbnc needs to be forced open, so that eic can wake up normally.
>
> Sounds reasonable to me. Should add a Fixes tag if need to backport for
> stable kernel?

Hi baolin:
We will make changes in patch v2.

Thanks
Wernhua.Lin

>
> > Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
> > ---
> >   drivers/gpio/gpio-eic-sprd.c | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.=
c
> > index 0d85d9e80848..c506cfd6df8e 100644
> > --- a/drivers/gpio/gpio-eic-sprd.c
> > +++ b/drivers/gpio/gpio-eic-sprd.c
> > @@ -23,6 +23,7 @@
> >   #define SPRD_EIC_DBNC_IC            0x24
> >   #define SPRD_EIC_DBNC_TRIG          0x28
> >   #define SPRD_EIC_DBNC_CTRL0         0x40
> > +#define SPRD_EIC_DBNC_FORCE_CLK              0x8000
> >
> >   #define SPRD_EIC_LATCH_INTEN                0x0
> >   #define SPRD_EIC_LATCH_INTRAW               0x4
> > @@ -213,6 +214,7 @@ static int sprd_eic_set_debounce(struct gpio_chip *=
chip, unsigned int offset,
> >       u32 value =3D readl_relaxed(base + reg) & ~SPRD_EIC_DBNC_MASK;
> >
> >       value |=3D (debounce / 1000) & SPRD_EIC_DBNC_MASK;
> > +     value |=3D SPRD_EIC_DBNC_FORCE_CLK;
> >       writel_relaxed(value, base + reg);
> >
> >       return 0;