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From:   Linus Walleij <linus.walleij@linaro.org>
Date:   Thu, 10 Aug 2023 10:48:33 +0200
Message-ID: <CACRpkdYwn515kDvO_gDtp4XV=DWjpf_pO-VOQp2KWX_J=ceUMw@mail.gmail.com>
Subject: Re: [PATCH v3] pinctrl: qcom: Add intr_target_width field to support
 increased number of interrupt targets
To:     Ninad Naik <quic_ninanaik@quicinc.com>
Cc:     andersson@kernel.org, agross@kernel.org, konrad.dybcio@linaro.org,
        linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
        linux-kernel@vger.kernel.org, quic_ymg@quicinc.com,
        bartosz.golaszewski@linaro.org, quic_psodagud@quicinc.com,
        quic_ppareek@quicinc.com, quic_kprasan@quicinc.com,
        Andrew Halaney <ahalaney@redhat.com>,
        Bjorn Andersson <quic_bjorande@quicinc.com>
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On Wed, Aug 9, 2023 at 12:09=E2=80=AFPM Ninad Naik <quic_ninanaik@quicinc.c=
om> wrote:

> SA8775 and newer target have added support for an increased number of
> interrupt targets. To implement this change, the intr_target field, which
> is used to configure the interrupt target in the interrupt configuration
> register is increased from 3 bits to 4 bits.
>
> In accordance to these updates, a new intr_target_width member is
> introduced in msm_pingroup structure. This member stores the value of
> width of intr_target field in the interrupt configuration register. This
> value is used to dynamically calculate and generate mask for setting the
> intr_target field. By default, this mask is set to 3 bit wide, to ensure
> backward compatibility with the older targets.
>
> Fixes: 4b6b18559927 ("pinctrl: qcom: add the tlmm driver sa8775p platform=
s")
>
> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8775p-ride
> Signed-off-by: Ninad Naik <quic_ninanaik@quicinc.com>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>

Patch applied for fixes!

Yours,
Linus Walleij