Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <beb378c1-cba4-26a0-0737-90243ec226c1@kernel.org>
Date:   Thu, 10 Aug 2023 05:56:25 -0500
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101
 Thunderbird/102.13.0
Subject: Re: [PATCH v2 4/5] clk: socfpga: agilex: add clock driver for the
 Agilex5
Content-Language: en-US
To:     Stephen Boyd <sboyd@kernel.org>, niravkumar.l.rabara@intel.com
Cc:     adrian.ho.yin.ng@intel.com, andrew@lunn.ch, conor+dt@kernel.org,
        devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        mturquette@baylibre.com, netdev@vger.kernel.org,
        p.zabel@pengutronix.de, richardcochran@gmail.com,
        robh+dt@kernel.org, wen.ping.teh@intel.com
References: <20230618132235.728641-1-niravkumar.l.rabara@intel.com>
 <20230801010234.792557-1-niravkumar.l.rabara@intel.com>
 <20230801010234.792557-5-niravkumar.l.rabara@intel.com>
 <4c0dfd1c-2b61-b954-73ad-ac8d4b82487d@kernel.org>
 <677706de77d5d5b799d25c855a723b2c.sboyd@kernel.org>
From:   Dinh Nguyen <dinguyen@kernel.org>
In-Reply-To: <677706de77d5d5b799d25c855a723b2c.sboyd@kernel.org>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 8/9/23 16:28, Stephen Boyd wrote:
> Quoting Dinh Nguyen (2023-08-08 04:03:47)
>> Hi Stephen/Mike,
>>
>> On 7/31/23 20:02, niravkumar.l.rabara@intel.com wrote:
>>> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>>
>>> Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
>>> driver for the Agilex5 is very similar to the Agilex platform,we can
>>> re-use most of the Agilex clock driver.
>>>
>>> Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com>
>>> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
>>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>> ---
>>>    drivers/clk/socfpga/clk-agilex.c | 433 ++++++++++++++++++++++++++++++-
>>>    1 file changed, 431 insertions(+), 2 deletions(-)
>>>
>>
>> If you're ok with this patch, can I take this through armsoc?
>>
> 
> Usually any binding files go through arm-soc and clk tree but the driver
> only goes through clk tree via a PR. Is that possible here?

Ok. Should be fine in this case.

Thanks,
Dinh