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Thu, 10 Aug 2023 11:06:39 +0000 (GMT) From: "Alim Akhtar" To: "'Krzysztof Kozlowski'" , "'Sylwester Nawrocki'" , "'Tomasz Figa'" , "'Chanwoo Choi'" , "'Michael Turquette'" , "'Stephen Boyd'" , "'Rob Herring'" , "'Conor Dooley'" , , , , , In-Reply-To: <20230808082738.122804-2-krzysztof.kozlowski@linaro.org> Subject: RE: [PATCH 01/11] clk: samsung: exynos3250: do not define number of clocks in bindings Date: Thu, 10 Aug 2023 16:36:38 +0530 Message-ID: <000001d9cb7a$bdf0e4f0$39d2aed0$@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQKdkXeLsq2DobfMxxfuGwY9MCDG5gJRntl7AcIuwwyuOzLdAA== Content-Language: en-us X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrAJsWRmVeSWpSXmKPExsWy7bCmuu6hI1dSDHqnyFus2XuOyeL6l+es FvOPnGO12Pt6K7vFpsfXWC0+9txjtbi8aw6bxYzz+5gsLp5ytWjde4Td4vCbdlaLf9c2slis 2vWH0YHX4/2NVnaPnbPusntsWtXJ5nHn2h42j81L6j36tqxi9Pi8SS6APSrbJiM1MSW1SCE1 Lzk/JTMv3VbJOzjeOd7UzMBQ19DSwlxJIS8xN9VWycUnQNctMwfoWCWFssScUqBQQGJxsZK+ nU1RfmlJqkJGfnGJrVJqQUpOgUmBXnFibnFpXrpeXmqJlaGBgZEpUGFCdsazXSfYC9ZJVuze s565gbFftIuRg0NCwETifJNtFyMXh5DAbkaJ2bvvMUI4nxgluhdfZYJwvjFKvJ78mq2LkROs 4+P6JywQib2MEvOnXYVyXjJKHH3yix2kik1AV2LH4jY2kISIwCwWid+HVzOCJDgFXCXWnJnJ BrJcWCBRovslH0iYRUBV4vfNa8wgNq+ApcTS5a0sELagxMmZT8BsZgF5ie1v5zBDXKEg8fPp MlYQW0TASeLu7AmsEDXiEi+PHmEH2SshcIJDYtHXU4wQDS4Su15sZYKwhSVeHd/CDmFLSXx+ t5cNEhgeEov+SEGEMyTeLl8P1WovceDKHBaQEmYBTYn1u/QhVvFJ9P5+wgTRySvR0SYEUa0q 0fzuKguELS0xsbubFcL2kJjQdggaoJcZJXpufWSfwKgwC8mXs5B8OQvJN7MQNi9gZFnFKJla UJybnlpsWmCUl1oOj+/k/NxNjOCkrOW1g/Hhgw96hxiZOBgPMUpwMCuJ8NoGX0oR4k1JrKxK LcqPLyrNSS0+xGgKDPqJzFKiyfnAvJBXEm9oYmlgYmZmZmJpbGaoJM77unVuipBAemJJanZq akFqEUwfEwenVANTWbVh3894nZlcrzcvY3tzZavqxPD15q9727qu/5eQv/Z1dQBXpjp3MVOx 3+/CY483NzW6/zqXwN32SX7xpGIxczOrWN1DDtcm3OI0/PXX6vH9B89DV76oiNzLfu6f76P+ 5a+VG/ZmcE3cfenPpOm2GueaJX+ksdtWTBT8VDOhNE3SxfHf8saDCrd4+SNElzm5V5YmL9vY cmhttOfNzUrff/SlCN+9s0hCKkv5T9t9TpYiv9PKHWEebo4eTn4Z550eFVbvajKzObc6/7yK 9qGFujnZusLrvnDUlrIcZ5nvP2OrR8DMkIlrtlawdJhM47R9/eW+ErdQ3Ip7ay93vS/advxt wtriEz33+yUnTQpXYinOSDTUYi4qTgQAJxdsgVMEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprDIsWRmVeSWpSXmKPExsWy7bCSvO6hI1dSDK7cZbRYs/cck8X1L89Z LeYfOcdqsff1VnaLTY+vsVp87LnHanF51xw2ixnn9zFZXDzlatG69wi7xeE37awW/65tZLFY tesPowOvx/sbreweO2fdZffYtKqTzePOtT1sHpuX1Hv0bVnF6PF5k1wAexSXTUpqTmZZapG+ XQJXxrNdJ9gL1klW7N6znrmBsV+0i5GTQ0LAROLj+icsXYxcHEICuxkl1hx4wQiRkJa4vnEC O4QtLLHy33N2iKLnjBIvz64AK2IT0JXYsbiNDSQhIrCEReLc423MEFXnGSXmffkPVsUp4Cqx 5sxMoCoODmGBeImNk2JAwiwCqhK/b15jBrF5BSwlli5vZYGwBSVOzgQ5iYODWUBPom0j2BRm AXmJ7W/nMEMcpCDx8+kyVhBbRMBJ4u7sCawQNeISL48eYZ/AKDQLyaRZCJNmIZk0C0nHAkaW VYySqQXFuem5yYYFhnmp5XrFibnFpXnpesn5uZsYwRGopbGD8d78f3qHGJk4GA8xSnAwK4nw 2gZfShHiTUmsrEotyo8vKs1JLT7EKM3BoiTOazhjdoqQQHpiSWp2ampBahFMlomDU6qBacWn JjPH1lJH2W6BpyL8N1X2Tpjm3cJul7S9cXL5nexOZ4tXfUnfQrk9Og99PFwu9yZLLfBvqqbS hg06/fkRjbpPJnxSFmNcz3btvQ9jcvYyXV+l1Pmy0x4f+/BmS5LjyeKpfllaLY76z1UzhXz4 /85qMU5lW6V9SvBfGNcMa5e2NVcf92vf61ogWuRf6lb6aMKOdQkLMntSxFdc/2h6awXrHfYC j+NNTZqnTPqsghykP3kZbru49l3/BeELYVnnXVymWwnoFmxv4Mv9vNIyd62i2+8zJXWOPL/M +3/Ottt9Z09zwD6Pg98TNqkJiflt9M/XtVdq6elSmFx79szqa0drZ3lwLT07NddynbcSS3FG oqEWc1FxIgAZZi4MLwMAAA== X-CMS-MailID: 20230810110642epcas5p3dc1eac46a5f972debcec44eb86b10723 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20230808082748epcas5p28ebacab566626323d38ac977610855f0 References: <20230808082738.122804-1-krzysztof.kozlowski@linaro.org> <20230808082738.122804-2-krzysztof.kozlowski@linaro.org> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Krzysztof Kozlowski > Sent: Tuesday, August 8, 2023 1:57 PM > To: Krzysztof Kozlowski ; Sylwester > Nawrocki ; Tomasz Figa > ; Chanwoo Choi ; Alim > Akhtar ; Michael Turquette > ; Stephen Boyd ; Rob > Herring ; Conor Dooley ; > linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org > Subject: [PATCH 01/11] clk: samsung: exynos3250: do not define number of > clocks in bindings > > Number of clocks supported by Linux drivers might vary - sometimes we add > new clocks, not exposed previously. Therefore this number of clocks should > not be in the bindings, because otherwise we should not change it. > > Define number of clocks per each clock controller inside the driver directly. > > Signed-off-by: Krzysztof Kozlowski > --- Reviewed-by: Alim Akhtar > drivers/clk/samsung/clk-exynos3250.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk- > exynos3250.c > index 6cc65ccf867c..a02461667664 100644 > --- a/drivers/clk/samsung/clk-exynos3250.c > +++ b/drivers/clk/samsung/clk-exynos3250.c > @@ -100,6 +100,11 @@ > #define PWR_CTRL1_USE_CORE1_WFI (1 << 1) > #define PWR_CTRL1_USE_CORE0_WFI (1 << 0) > > +/* NOTE: Must be equal to the last clock ID increased by one */ > +#define CLKS_NR_MAIN (CLK_SCLK_MMC2 + > 1) > +#define CLKS_NR_DMC (CLK_DIV_DMCD + 1) > +#define CLKS_NR_ISP (CLK_SCLK_MPWM_ISP + 1) > + > static const unsigned long exynos3250_cmu_clk_regs[] __initconst = { > SRC_LEFTBUS, > DIV_LEFTBUS, > @@ -807,7 +812,7 @@ static const struct samsung_cmu_info cmu_info > __initconst = { > .nr_fixed_factor_clks = ARRAY_SIZE(fixed_factor_clks), > .cpu_clks = exynos3250_cpu_clks, > .nr_cpu_clks = ARRAY_SIZE(exynos3250_cpu_clks), > - .nr_clk_ids = CLK_NR_CLKS, > + .nr_clk_ids = CLKS_NR_MAIN, > .clk_regs = exynos3250_cmu_clk_regs, > .nr_clk_regs = ARRAY_SIZE(exynos3250_cmu_clk_regs), > }; > @@ -923,7 +928,7 @@ static const struct samsung_cmu_info dmc_cmu_info > __initconst = { > .nr_mux_clks = ARRAY_SIZE(dmc_mux_clks), > .div_clks = dmc_div_clks, > .nr_div_clks = ARRAY_SIZE(dmc_div_clks), > - .nr_clk_ids = NR_CLKS_DMC, > + .nr_clk_ids = CLKS_NR_DMC, > .clk_regs = exynos3250_cmu_dmc_clk_regs, > .nr_clk_regs = > ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs), > }; > @@ -1067,7 +1072,7 @@ static const struct samsung_cmu_info isp_cmu_info > __initconst = { > .nr_div_clks = ARRAY_SIZE(isp_div_clks), > .gate_clks = isp_gate_clks, > .nr_gate_clks = ARRAY_SIZE(isp_gate_clks), > - .nr_clk_ids = NR_CLKS_ISP, > + .nr_clk_ids = CLKS_NR_ISP, > }; > > static int __init exynos3250_cmu_isp_probe(struct platform_device *pdev) > -- > 2.34.1