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Date:   Thu, 10 Aug 2023 15:11:18 -0600
From:   Rob Herring <robh@kernel.org>
To:     Luo Jie <quic_luoj@quicinc.com>
Cc:     linux-clk@vger.kernel.org, will@kernel.org, conor+dt@kernel.org,
        p.zabel@pengutronix.de, devicetree@vger.kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
        konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org,
        robh+dt@kernel.org, mturquette@baylibre.com,
        quic_srichara@quicinc.com, sboyd@kernel.org,
        catalin.marinas@arm.com, agross@kernel.org, andersson@kernel.org
Subject: Re: [PATCH v3 2/3] dt-bindings: clock: add qca8386/qca8084 clock and
 reset definitions
Message-ID: <169170187710.1192576.13560521597205216697.robh@kernel.org>
References: <20230810115419.25539-1-quic_luoj@quicinc.com>
 <20230810115419.25539-3-quic_luoj@quicinc.com>
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On Thu, 10 Aug 2023 19:54:18 +0800, Luo Jie wrote:
> QCA8386/QCA8084 includes the clock & reset controller that is
> accessed by MDIO bus. Two work modes are supported, qca8386 works
> as switch mode, qca8084 works as PHY mode.
> 
> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
> ---
>  .../bindings/clock/qcom,qca8k-nsscc.yaml      |  79 ++++++++++++++
>  include/dt-bindings/clock/qcom,qca8k-nsscc.h  | 101 ++++++++++++++++++
>  include/dt-bindings/reset/qcom,qca8k-nsscc.h  |  75 +++++++++++++
>  3 files changed, 255 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,qca8k-nsscc.h
>  create mode 100644 include/dt-bindings/reset/qcom,qca8k-nsscc.h
> 

Reviewed-by: Rob Herring <robh@kernel.org>