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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR12MB5676.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: fb87a7c8-2a9b-461f-5cd0-08db9a055139 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Aug 2023 00:53:03.1225 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XmCPTeG/DF0V+p9KAnJ7C668VntDHTrtATaEFhTH6th+WRGrAS1k2lDSN0yyV8jR/Rqha39nx5VvM/rbeT1zQQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8155 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Will, Please see my reply inline. > -----Original Message----- > From: Will Deacon > Sent: Friday, July 28, 2023 8:22 AM > To: Besar Wicaksono ; suzuki.poulose@arm.com > Cc: robin.murphy@arm.com; ilkka@os.amperecomputing.com; > catalin.marinas@arm.com; mark.rutland@arm.com; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux- > tegra@vger.kernel.org; Thierry Reding ; Jonathan > Hunter ; Vikram Sethi ; Richard > Wiley ; Eric Funsten > Subject: Re: [PATCH v5] perf: arm_cspmu: Separate Arm and vendor module >=20 > External email: Use caution opening links or attachments >=20 >=20 > On Wed, Jul 05, 2023 at 05:47:45AM -0500, Besar Wicaksono wrote: > > Arm Coresight PMU driver consists of main standard code and > > vendor backend code. Both are currently built as a single module. > > This patch adds vendor registration API to separate the two to > > keep things modular. The main driver requests each known backend > > module during initialization and defer device binding process. > > The backend module then registers an init callback to the main > > driver and continue the device driver binding process. > > > > Signed-off-by: Besar Wicaksono > > --- > > > > Changes from v4: > > * Fix warning reported by kernel test robot > > v4: https://lore.kernel.org/linux-arm-kernel/20230620041438.32514-1- > bwicaksono@nvidia.com/T/#u >=20 > One minor comment below, but this mostly looks good to me. I'd like Suzuk= i's > Ack before I queue it, though. >=20 > > + /* Load implementer module and initialize the callbacks. */ > > + if (match) { > > + mutex_lock(&arm_cspmu_lock); > > + > > + if (match->impl_init_ops) { > > + if (try_module_get(match->module)) { > > + cspmu->impl.match =3D match; > > + ret =3D match->impl_init_ops(cspmu); > > + module_put(match->module); >=20 > Why is it safe to drop the module reference here? If I'm understanding th= e > flow correctly, ->impl_init_ops() will populate more function pointers > in the cspmu->impl.ops structure, and we don't appear to take a module > reference when calling those. >=20 > What happens if the backend module is unloaded while the core module > is executed those functions? >=20 We also update the call to perf_pmu_register and provide the backend module= handle. The core perf kernel will acquire the reference on the backend module prior= to calling the functions in cspmu->imp.ops. Please see the change below +static inline struct module *arm_cspmu_get_module(struct arm_cspmu *cspmu) +{ + return (cspmu->impl.match) ? cspmu->impl.match->module : THIS_MODULE; +} + static int arm_cspmu_register_pmu(struct arm_cspmu *cspmu) { int ret, capabilities; @@ -1149,7 +1173,7 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *c= spmu) =20 cspmu->pmu =3D (struct pmu){ .task_ctx_nr =3D perf_invalid_context, - .module =3D THIS_MODULE, + .module =3D arm_cspmu_get_module(cspmu), .pmu_enable =3D arm_cspmu_enable, .pmu_disable =3D arm_cspmu_disable, .event_init =3D arm_cspmu_event_init, Regards, Besar