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Message-ID: <96c29015f86c84722c08a7ab2272f1355d6042ce.camel@pengutronix.de>
Subject: Re: [PATCH 2/2] arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock
From:   Lucas Stach <l.stach@pengutronix.de>
To:     Adam Ford <aford173@gmail.com>,
        linux-arm-kernel@lists.infradead.org
Cc:     aford@beaconembedded.com, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Date:   Mon, 14 Aug 2023 10:23:38 +0200
In-Reply-To: <20230813162906.22640-2-aford173@gmail.com>
References: <20230813162906.22640-1-aford173@gmail.com>
         <20230813162906.22640-2-aford173@gmail.com>
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Am Sonntag, dem 13.08.2023 um 11:29 -0500 schrieb Adam Ford:
> A previous patch removed the audio PLL configuration from the clk
> node, which resulted in an incorrect clock rate when attempting
> to playback audio.  Fix this by setting the AUDIO_PLL2 rate inside
> the SAI3 node since it's the SAI3 that needs it.
> 
> Fixes: 16c984524862 ("arm64: dts: imx8mp: don't initialize audio clocks from CCM node")
> Signed-off-by: Adam Ford <aford173@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
> index 06e91297fb16..acd265d8b58e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
> @@ -381,9 +381,10 @@ &pcie_phy {
>  &sai3 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_sai3>;
> -	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
> +	assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
> +			  <&clk IMX8MP_AUDIO_PLL2> ;
>  	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
> -	assigned-clock-rates = <12288000>;
> +	assigned-clock-rates = <12288000>, <361267200>;
>  	fsl,sai-mclk-direction-output;
>  	status = "okay";
>  };