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Message-ID: <ab4a51ea-3956-2d2f-5705-a760be69fb59@arm.com>
Date:   Tue, 15 Aug 2023 11:24:31 +0100
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Subject: Re: [PATCH v6 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit
 writes
To:     Ilkka Koskinen <ilkka@os.amperecomputing.com>,
        Will Deacon <will@kernel.org>,
        Robin Murphy <robin.murphy@arm.com>,
        Besar Wicaksono <bwicaksono@nvidia.com>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Jonathan Corbet <corbet@lwn.net>
Cc:     linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-doc@vger.kernel.org
References: <20230815063526.9022-1-ilkka@os.amperecomputing.com>
 <20230815063526.9022-2-ilkka@os.amperecomputing.com>
From:   Suzuki K Poulose <suzuki.poulose@arm.com>
In-Reply-To: <20230815063526.9022-2-ilkka@os.amperecomputing.com>
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Precedence: bulk

On 15/08/2023 07:35, Ilkka Koskinen wrote:
> Split the 64-bit register accesses if 64-bit access is not supported
> by the PMU.
> 
> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> Reviewed-by: Besar Wicaksono <bwicaksono@nvidia.com>

Do we need a Fixes tag ?

With that:

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

Suzuki

> ---
>   drivers/perf/arm_cspmu/arm_cspmu.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c
> index 04be94b4aa48..6387cbad7a7d 100644
> --- a/drivers/perf/arm_cspmu/arm_cspmu.c
> +++ b/drivers/perf/arm_cspmu/arm_cspmu.c
> @@ -715,7 +715,10 @@ static void arm_cspmu_write_counter(struct perf_event *event, u64 val)
>   	if (use_64b_counter_reg(cspmu)) {
>   		offset = counter_offset(sizeof(u64), event->hw.idx);
>   
> -		writeq(val, cspmu->base1 + offset);
> +		if (cspmu->has_atomic_dword)
> +			writeq(val, cspmu->base1 + offset);
> +		else
> +			lo_hi_writeq(val, cspmu->base1 + offset);


>   	} else {
>   		offset = counter_offset(sizeof(u32), event->hw.idx);
>