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CC:     <yangyicong@hisilicon.com>, <hejunhao3@huawei.com>,
        <prime.zeng@hisilicon.com>, <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>
Subject: Re: [PATCH v2] drivers/perf: hisi: Schedule perf session according to
 locality
To:     <jonathan.cameron@huawei.com>, <will@kernel.org>,
        <mark.rutland@arm.com>
References: <20230815130613.535-1-yangyicong@huawei.com>
From:   Yicong Yang <yangyicong@huawei.com>
Message-ID: <2eb98cd6-21a1-8e2c-ddf4-41dad5f2a2cb@huawei.com>
Date:   Tue, 15 Aug 2023 21:14:41 +0800
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Hi,

Please ignore this due to the wrong format of the changelog. Has resend. Sorry for the noise.

On 2023/8/15 21:06, Yicong Yang wrote:
> From: Yicong Yang <yangyicong@hisilicon.com>
> 
> The PCIe PMUs locate on different NUMA node but currently we don't
> consider it and likely stack all the sessions on the same CPU:
> 
> [root@localhost tmp]# cat /sys/devices/hisi_pcie*/cpumask
> 0
> 0
> 0
> 0
> 0
> 0
> 
> This can be optimize a bit to use a local CPU for the PMU.
> 
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
> Change since v2:
> - Make interrupt affinity consistent with CPU in online handler
> Link: https://lore.kernel.org/all/20230808125147.2080-1-yangyicong@huawei.com/
> 
> ---
>  drivers/perf/hisilicon/hisi_pcie_pmu.c | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
> index e10fc7cb9493..5a00adb2de8c 100644
> --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
> +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
> @@ -665,8 +665,8 @@ static int hisi_pcie_pmu_online_cpu(unsigned int cpu, struct hlist_node *node)
>  	struct hisi_pcie_pmu *pcie_pmu = hlist_entry_safe(node, struct hisi_pcie_pmu, node);
>  
>  	if (pcie_pmu->on_cpu == -1) {
> -		pcie_pmu->on_cpu = cpu;
> -		WARN_ON(irq_set_affinity(pcie_pmu->irq, cpumask_of(cpu)));
> +		pcie_pmu->on_cpu = cpumask_local_spread(0, dev_to_node(&pcie_pmu->pdev->dev));
> +		WARN_ON(irq_set_affinity(pcie_pmu->irq, cpumask_of(pcie_pmu->on_cpu)));
>  	}
>  
>  	return 0;
> @@ -676,14 +676,23 @@ static int hisi_pcie_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node)
>  {
>  	struct hisi_pcie_pmu *pcie_pmu = hlist_entry_safe(node, struct hisi_pcie_pmu, node);
>  	unsigned int target;
> +	cpumask_t mask;
> +	int numa_node;
>  
>  	/* Nothing to do if this CPU doesn't own the PMU */
>  	if (pcie_pmu->on_cpu != cpu)
>  		return 0;
>  
>  	pcie_pmu->on_cpu = -1;
> -	/* Choose a new CPU from all online cpus. */
> -	target = cpumask_any_but(cpu_online_mask, cpu);
> +
> +	/* Choose a local CPU from all online cpus. */
> +	numa_node = dev_to_node(&pcie_pmu->pdev->dev);
> +	if (cpumask_and(&mask, cpumask_of_node(numa_node), cpu_online_mask) &&
> +	    cpumask_andnot(&mask, &mask, cpumask_of(cpu)))
> +		target = cpumask_any(&mask);
> +	else
> +		target = cpumask_any_but(cpu_online_mask, cpu);
> +
>  	if (target >= nr_cpu_ids) {
>  		pci_err(pcie_pmu->pdev, "There is no CPU to set\n");
>  		return 0;
>