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Date:   Fri, 18 Aug 2023 14:16:18 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Justin Lai <justinlai0215@realtek.com>
Cc:     "kuba@kernel.org" <kuba@kernel.org>,
        "davem@davemloft.net" <davem@davemloft.net>,
        "edumazet@google.com" <edumazet@google.com>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [PATCH net-next v3 1/2] net/ethernet/realtek: Add Realtek
 automotive PCIe driver code
Message-ID: <4b630aeb-3098-4108-b8dc-7da6e55a7cf1@lunn.ch>
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> > Is the 'line' speed of the MAC fixed? It operates at one speed, and that is it?
> 
> Hi, Andrew
> 

> The "line" speed of the MAC is fixed 5G, but the throughput will be
> determined according to the speed of the PCIe link. For example, if
> the link speed is gen 3, the throughput will be 5G. if the link
> speed is gen 2, the throughput will be 2.5G. if the link speed is
> gen 1, the throughput will be 1G.

ksettings does not return throughput, it returns the line
speed. throughput is determined by a lot of different things, can the
CPU handle frames fast enough, is the memory bandwidth high enough,
what is happening on other ports of the PCIe switch etc.

There is at least one driver i know of which reports a warning at
probe time, if it finds the device is on a bus which cannot support
the full bandwidth. Maybe copy that.

> There is no extra fields in DMA descriptors for tagging
> protocol. The tag added by switch hardware instead of this driver.

> > Are the I2C, MDIO and SPI bus masters also hanging off a PCIE endpoint? Can
> > they probe independently? I'm just want to check this should not be part of an
> > MFD driver.
> 

> The I2C, MDIO and SPI bus masters are not hanging off the PCIE
> endpoints, but on the switch core.

So the switch core is also an PCIE endpoint? 

   Andrew