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From:   Guo Ren <guoren@kernel.org>
Date:   Wed, 30 Aug 2023 09:37:05 +0800
Message-ID: <CAJF2gTR2vZLFo=cfg+KD_LY8z=_D4sLROGgx4GiwTYKXt=8k4w@mail.gmail.com>
Subject: Re: [PATCH] riscv: kprobes: allow writing to x0
To:     Nam Cao <namcaov@gmail.com>
Cc:     Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        stable@vger.kernel.org
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On Wed, Aug 30, 2023 at 2:25=E2=80=AFAM Nam Cao <namcaov@gmail.com> wrote:
>
> Instructions can write to x0, so we should simulate these instructions
> normally.
>
> Currently, the kernel hangs if an instruction who writes to x0 is
> simulated.
>
> Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
> Cc: stable@vger.kernel.org
> Signed-off-by: Nam Cao <namcaov@gmail.com>
> ---
>  arch/riscv/kernel/probes/simulate-insn.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel=
/probes/simulate-insn.c
> index d3099d67816d..6c166029079c 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.c
> +++ b/arch/riscv/kernel/probes/simulate-insn.c
> @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *=
regs, u32 index,
>                                        unsigned long val)
>  {
>         if (index =3D=3D 0)
> -               return false;
> +               return true;
Acked-by: Guo Ren <guoren@kernel.org>

>         else if (index <=3D 31)
>                 *((unsigned long *)regs + index) =3D val;
>         else
> --
> 2.34.1
>


--=20
Best Regards
 Guo Ren