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Date:   Fri, 8 Sep 2023 13:41:29 -0100
From:   Melissa Wen <mwen@igalia.com>
To:     Harry Wentland <harry.wentland@amd.com>
Cc:     amd-gfx@lists.freedesktop.org,
        Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
        sunpeng.li@amd.com, Alex Deucher <alexander.deucher@amd.com>,
        dri-devel@lists.freedesktop.org, christian.koenig@amd.com,
        Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch,
        Joshua Ashton <joshua@froggi.es>,
        Sebastian Wick <sebastian.wick@redhat.com>,
        Xaver Hugl <xaver.hugl@gmail.com>,
        Shashank Sharma <Shashank.Sharma@amd.com>,
        Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
        sungjoon.kim@amd.com, Alex Hung <alex.hung@amd.com>,
        Pekka Paalanen <pekka.paalanen@collabora.com>,
        Simon Ser <contact@emersion.fr>, kernel-dev@igalia.com,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 32/34] drm/amd/display: add plane CTM driver-specific
 property
Message-ID: <20230908144129.o2rtvyydy5lhggre@mail.igalia.com>
References: <20230810160314.48225-1-mwen@igalia.com>
 <20230810160314.48225-33-mwen@igalia.com>
 <d50e07fe-4e8e-4e18-ae75-ba351c3c95ad@amd.com>
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In-Reply-To: <d50e07fe-4e8e-4e18-ae75-ba351c3c95ad@amd.com>
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On 09/06, Harry Wentland wrote:
> 
> 
> On 2023-08-10 12:03, Melissa Wen wrote:
> > Plane CTM for pre-blending color space conversion. Only enable
> > driver-specific plane CTM property on drivers that support both pre- and
> > post-blending gamut remap matrix, i.e., DCN3+ family. Otherwise it
> > conflits with DRM CRTC CTM property.
> > 
> > Signed-off-by: Melissa Wen <mwen@igalia.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h      |  2 ++
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  7 +++++++
> >  .../amd/display/amdgpu_dm/amdgpu_dm_color.c   |  7 +++++++
> >  .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   | 20 +++++++++++++++++++
> >  4 files changed, 36 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> > index abb871a912d7..84bf501b02f4 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> > @@ -363,6 +363,8 @@ struct amdgpu_mode_info {
> >  	 * @plane_hdr_mult_property:
> >  	 */
> >  	struct drm_property *plane_hdr_mult_property;
> > +
> > +	struct drm_property *plane_ctm_property;
> >  	/**
> >  	 * @shaper_lut_property: Plane property to set pre-blending shaper LUT
> >  	 * that converts color content before 3D LUT.
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> > index 095f39f04210..6252ee912a63 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> > @@ -769,6 +769,13 @@ struct dm_plane_state {
> >  	 * S31.32 sign-magnitude.
> >  	 */
> >  	__u64 hdr_mult;
> > +	/**
> > +	 * @ctm:
> > +	 *
> > +	 * Color transformation matrix. See drm_crtc_enable_color_mgmt(). The
> > +	 * blob (if not NULL) is a &struct drm_color_ctm.
> > +	 */
> > +	struct drm_property_blob *ctm;
> >  	/**
> >  	 * @shaper_lut: shaper lookup table blob. The blob (if not NULL) is an
> >  	 * array of &struct drm_color_lut.
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> > index 4356846a2bce..86a918ab82be 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> > @@ -218,6 +218,13 @@ amdgpu_dm_create_color_properties(struct amdgpu_device *adev)
> >  		return -ENOMEM;
> >  	adev->mode_info.plane_hdr_mult_property = prop;
> >  
> > +	prop = drm_property_create(adev_to_drm(adev),
> > +				   DRM_MODE_PROP_BLOB,
> > +				   "AMD_PLANE_CTM", 0);
> 
> We'll want to wrap the property creation/attachment with
> #ifdef AMD_PRIVATE_COLOR here as well.

yeah, it's already wrapped because it's created and attached together
with the other properties.

> 
> Harry
> 
> > +	if (!prop)
> > +		return -ENOMEM;
> > +	adev->mode_info.plane_ctm_property = prop;
> > +
> >  	prop = drm_property_create(adev_to_drm(adev),
> >  				   DRM_MODE_PROP_BLOB,
> >  				   "AMD_PLANE_SHAPER_LUT", 0);
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> > index 3fd57de7c5be..0b1081c690cb 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> > @@ -1355,6 +1355,8 @@ dm_drm_plane_duplicate_state(struct drm_plane *plane)
> >  
> >  	if (dm_plane_state->degamma_lut)
> >  		drm_property_blob_get(dm_plane_state->degamma_lut);
> > +	if (dm_plane_state->ctm)
> > +		drm_property_blob_get(dm_plane_state->ctm);
> >  	if (dm_plane_state->shaper_lut)
> >  		drm_property_blob_get(dm_plane_state->shaper_lut);
> >  	if (dm_plane_state->lut3d)
> > @@ -1436,6 +1438,8 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane,
> >  
> >  	if (dm_plane_state->degamma_lut)
> >  		drm_property_blob_put(dm_plane_state->degamma_lut);
> > +	if (dm_plane_state->ctm)
> > +		drm_property_blob_put(dm_plane_state->ctm);
> >  	if (dm_plane_state->lut3d)
> >  		drm_property_blob_put(dm_plane_state->lut3d);
> >  	if (dm_plane_state->shaper_lut)
> > @@ -1473,6 +1477,11 @@ dm_atomic_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
> >  				   dm->adev->mode_info.plane_hdr_mult_property,
> >  				   AMDGPU_HDR_MULT_DEFAULT);
> >  
> > +	/* Only enable plane CTM if both DPP and MPC gamut remap is available. */
> > +	if (dm->dc->caps.color.mpc.gamut_remap)
> > +		drm_object_attach_property(&plane->base,
> > +					   dm->adev->mode_info.plane_ctm_property, 0);
> > +
> >  	if (dpp_color_caps.hw_3d_lut) {
> >  		drm_object_attach_property(&plane->base,
> >  					   mode_info.plane_shaper_lut_property, 0);
> > @@ -1530,6 +1539,14 @@ dm_atomic_plane_set_property(struct drm_plane *plane,
> >  			dm_plane_state->hdr_mult = val;
> >  			dm_plane_state->base.color_mgmt_changed = 1;
> >  		}
> > +	} else if (property == adev->mode_info.plane_ctm_property) {
> > +		ret = drm_property_replace_blob_from_id(plane->dev,
> > +							&dm_plane_state->ctm,
> > +							val,
> > +							sizeof(struct drm_color_ctm), -1,
> > +							&replaced);
> > +		dm_plane_state->base.color_mgmt_changed |= replaced;
> > +		return ret;
> >  	} else if (property == adev->mode_info.plane_shaper_lut_property) {
> >  		ret = drm_property_replace_blob_from_id(plane->dev,
> >  							&dm_plane_state->shaper_lut,
> > @@ -1591,6 +1608,9 @@ dm_atomic_plane_get_property(struct drm_plane *plane,
> >  		*val = dm_plane_state->degamma_tf;
> >  	} else if (property == adev->mode_info.plane_hdr_mult_property) {
> >  		*val = dm_plane_state->hdr_mult;
> > +	} else if (property == adev->mode_info.plane_ctm_property) {
> > +		*val = (dm_plane_state->ctm) ?
> > +			dm_plane_state->ctm->base.id : 0;
> >  	} else 	if (property == adev->mode_info.plane_shaper_lut_property) {
> >  		*val = (dm_plane_state->shaper_lut) ?
> >  			dm_plane_state->shaper_lut->base.id : 0;
>