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Subject: Re: [PATCH 08/37] clk: renesas: rzg2l: trust value returned by
 hardware
To:     Claudiu <claudiu.beznea@tuxon.dev>, <geert+renesas@glider.be>,
        <mturquette@baylibre.com>, <sboyd@kernel.org>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <conor+dt@kernel.org>, <ulf.hansson@linaro.org>,
        <linus.walleij@linaro.org>, <gregkh@linuxfoundation.org>,
        <jirislaby@kernel.org>, <magnus.damm@gmail.com>,
        <catalin.marinas@arm.com>, <will@kernel.org>,
        <prabhakar.mahadev-lad.rj@bp.renesas.com>,
        <biju.das.jz@bp.renesas.com>, <quic_bjorande@quicinc.com>,
        <arnd@arndb.de>, <konrad.dybcio@linaro.org>,
        <neil.armstrong@linaro.org>, <nfraprado@collabora.com>,
        <rafal@milecki.pl>, <wsa+renesas@sang-engineering.com>
CC:     <linux-renesas-soc@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-mmc@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
        <linux-serial@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
References: <20230912045157.177966-1-claudiu.beznea.uj@bp.renesas.com>
 <20230912045157.177966-9-claudiu.beznea.uj@bp.renesas.com>
From:   Sergey Shtylyov <s.shtylyov@omp.ru>
Organization: Open Mobile Platform
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Date:   Tue, 12 Sep 2023 19:43:52 +0300
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On 9/12/23 7:51 AM, Claudiu wrote:

> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> Initial value of CPG_PL2SDHI_DSEL bits 0..1 or 4..6 is 01b. Hardware user's
> manual (r01uh0914ej0130-rzg2l-rzg2lc.pdf) specifies that setting 0 is
> prohibited. The rzg2l_cpg_sd_clk_mux_get_parent() should just read
> CPG_PL2SDHI_DSEL, trust the value and return the proper clock parent index
> based on the read value. Do this.
> 
> Fixes: eaff33646f4cb ("clk: renesas: rzg2l: Add SDHI clk mux support")
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>  drivers/clk/renesas/rzg2l-cpg.c | 8 +-------
>  1 file changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
> index 1195d4b1f545..d0d086d6dc51 100644
> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c
> @@ -239,14 +239,8 @@ static u8 rzg2l_cpg_sd_clk_mux_get_parent(struct clk_hw *hw)
>  
>  	val >>= GET_SHIFT(hwdata->conf);
>  	val &= GENMASK(GET_WIDTH(hwdata->conf) - 1, 0);
> -	if (val) {
> -		val--;
> -	} else {
> -		/* Prohibited clk source, change it to 533 MHz(reset value) */
> -		rzg2l_cpg_sd_clk_mux_set_parent(hw, 0);
> -	}
>  
> -	return val;
> +	return val ? --val : val;

	return val ? val - 1 : 0;