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Message-ID: <5336dac4-af3f-46f7-bcf9-40314f744c8c@linaro.org>
Date:   Tue, 12 Sep 2023 11:59:47 +0200
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Subject: Re: [PATCH 4/4] cpufreq: qcom-nvmem: Add MSM8909
Content-Language: en-US
To:     Stephan Gerhold <stephan.gerhold@kernkonzept.com>,
        Viresh Kumar <viresh.kumar@linaro.org>
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Ilia Lin <ilia.lin@kernel.org>,
        "Rafael J. Wysocki" <rafael@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>, linux-pm@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, Ulf Hansson <ulf.hansson@linaro.org>
References: <20230912-msm8909-cpufreq-v1-0-767ce66b544b@kernkonzept.com>
 <20230912-msm8909-cpufreq-v1-4-767ce66b544b@kernkonzept.com>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
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In-Reply-To: <20230912-msm8909-cpufreq-v1-4-767ce66b544b@kernkonzept.com>
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Precedence: bulk

On 12.09.2023 11:40, Stephan Gerhold wrote:
> When the MSM8909 SoC is used together with the PM8909 PMIC the primary
> power supply for the CPU (VDD_APC) is shared with other components to
> the SoC, namely the VDD_CX power domain typically supplied by the PM8909
> S1 regulator. This means that all votes for necessary performance states
> go via the RPM firmware which collects the requirements from all the
> processors in the SoC. The RPM firmware then chooses the actual voltage
> based on the performance states ("corners"), depending on calibration
> values in the NVMEM and other factors.
> 
> The MSM8909 SoC is also sometimes used with the PM8916 or PM660 PMIC.
> In that case there is a dedicated regulator connected to VDD_APC and
> Linux is responsible to do adaptive voltage scaling using CPR (similar
> to the existing code for QCS404).
> 
> This difference can be described in the device tree, by either assigning
> the CPU a power domain from RPMPD or from the CPR driver.
> 
> To describe this in a more generic way, use "apc" as power domain name
> instead of "cpr". From the Linux point of view there is no CPR involved
> when MSM8909 is used together with PM8909.
Without checking, I have a vague recollection of CPR output also
being called VDD_APCx, so it's a-ok

> 
> Also add a simple function that reads the speedbin from a NVMEM cell
> and sets it as-is for opp-supported-hw. The actual bit position can be
> described in the device tree without additional driver changes.
> 
> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
> ---
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>

One nit below:

[...]

>  static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
> +	{ .compatible = "qcom,msm8909", .data = &match_data_msm8909 },
>  	{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
msm8909 should come after apq8096 (even if adding apq and not msm was
a mistake)

Konrad