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[209.85.219.169]) by smtp.gmail.com with ESMTPSA id d194-20020a814fcb000000b0058fb9863fe7sm297073ywb.103.2023.09.14.05.55.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Sep 2023 05:55:26 -0700 (PDT) Received: by mail-yb1-f169.google.com with SMTP id 3f1490d57ef6-d8181087dc9so915345276.3; Thu, 14 Sep 2023 05:55:26 -0700 (PDT) X-Received: by 2002:a25:b813:0:b0:d77:8fd3:36e with SMTP id v19-20020a25b813000000b00d778fd3036emr5095803ybj.20.1694696126345; Thu, 14 Sep 2023 05:55:26 -0700 (PDT) MIME-Version: 1.0 References: <20230912045157.177966-1-claudiu.beznea.uj@bp.renesas.com> <20230912045157.177966-10-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: <20230912045157.177966-10-claudiu.beznea.uj@bp.renesas.com> From: Geert Uytterhoeven Date: Thu, 14 Sep 2023 14:55:13 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 09/37] clk: renesas: rzg2l: fix computation formula To: Claudiu Cc: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, ulf.hansson@linaro.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com, quic_bjorande@quicinc.com, arnd@arndb.de, konrad.dybcio@linaro.org, neil.armstrong@linaro.org, nfraprado@collabora.com, rafal@milecki.pl, wsa+renesas@sang-engineering.com, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 14 Sep 2023 05:55:41 -0700 (PDT) X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Hi Claudiu, On Tue, Sep 12, 2023 at 6:52 AM Claudiu wrote: > From: Claudiu Beznea > > According to hardware manual of RZ/G2L (r01uh0914ej0130-rzg2l-rzg2lc.pdf) > the computation formula for PLL rate is as follows: > > Fout = ((m + k/65536) * Fin) / (p * 2^s) > > and k has values in range [-32768, 32767]. Dividing k by 65536 with > integer variables leads all the time to zero. Thus we may have slight > differences b/w what has been set vs. what is displayed. Thus, > get rid of this and decompose the formula before dividing k by 65536. > > Fixes: ef3c613ccd68a ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC") > Signed-off-by: Claudiu Beznea Thanks for your patch! > --- a/drivers/clk/renesas/rzg2l-cpg.c > +++ b/drivers/clk/renesas/rzg2l-cpg.c > @@ -696,18 +696,22 @@ static unsigned long rzg2l_cpg_pll_clk_recalc_rate(struct clk_hw *hw, > struct pll_clk *pll_clk = to_pll(hw); > struct rzg2l_cpg_priv *priv = pll_clk->priv; > unsigned int val1, val2; > - unsigned int mult = 1; > - unsigned int div = 1; > + unsigned int div; > + u64 rate; > + s16 kdiv; > > if (pll_clk->type != CLK_TYPE_SAM_PLL) > return parent_rate; > > val1 = readl(priv->base + GET_REG_SAMPLL_CLK1(pll_clk->conf)); > val2 = readl(priv->base + GET_REG_SAMPLL_CLK2(pll_clk->conf)); > - mult = MDIV(val1) + KDIV(val1) / 65536; > + kdiv = KDIV(val1); > div = PDIV(val1) << SDIV(val2); > > - return DIV_ROUND_CLOSEST_ULL((u64)parent_rate * mult, div); > + rate = (u64)MDIV(val1) * parent_rate; > + rate += ((long long)parent_rate * kdiv) / 65536; As the division is a binary shift, you can use the mul_u64_u32_shr() helper, and incorporate the sdiv shift at the same time: rate += mul_u64_u32_shr(parent_rate, KDIV(val1), 16 + SDIV(val2)); You can save a multiplication by premultiplying mdiv by 65536: rate = mul_u64_u32_shr(parent_rate, (MDIV(val1) << 16)) + KDIV(val1), 16 + SDIV(val2)); > + > + return DIV_ROUND_CLOSEST_ULL(rate, div); return DIV_ROUND_CLOSEST_ULL(rate, PDIV(val1)); > } > > static const struct clk_ops rzg2l_cpg_pll_ops = { Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds