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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694691120; x=1695295920; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NsttBv8HKlL9XAEyJGK+M8jti8yQoZtbn/MGaMyCekw=; b=cSmaHbOP4VRRFdUcgykYY0aK54IAwB/3Nie2JQ2Ecrt+F6fcnKmiMSALYqx35VF0+U ohVM1HkOmiOHmgDpunk9+5H2OQb2CHMeDtNrQwbnx2fW7zESFJEBnFrX8KJYtPRSG9Sx Dooev2C6c26qKdLIQqI2NReAVQTfRXf6sa7UkidsnbmS6HHfGKjGfTeqmKSVO+Z9fGL5 PzX8ROwJyH79p80RRRPzpyO30Cs5HwDhl+S4SD+LjEpCvmVwljaSszS3K3tBePDwGMY+ DPJYk45ZN+tldM2hw9aN6iu+AEM5QgXnXhLamCB/FRyfw1LpsTa9lrzARG/ZMk9PqW3l Qlyg== X-Gm-Message-State: AOJu0YyUrUozqAQCR6AH7ukN+vlcSXR9lOT4DOH1btUeTppE4XNt3PW9 6Pl10GsJWV5eyHQA+SvbSXxUneR19JQNmg0jmnc= X-Received: by 2002:a1f:dd82:0:b0:48f:c07e:433a with SMTP id u124-20020a1fdd82000000b0048fc07e433amr5030783vkg.11.1694691120138; Thu, 14 Sep 2023 04:32:00 -0700 (PDT) MIME-Version: 1.0 References: <20230913151606.69494-1-romain.perier@gmail.com> <20230913151606.69494-3-romain.perier@gmail.com> <20230913-depress-bootlace-6b88bfd83966@spud> <20230914-coagulant-unbroken-2461d32274a1@wendy> In-Reply-To: <20230914-coagulant-unbroken-2461d32274a1@wendy> From: Romain Perier Date: Thu, 14 Sep 2023 13:31:49 +0200 Message-ID: Subject: Re: [PATCH v2 2/3] dt-bindings: rtc: Add Mstar SSD202D RTC To: Conor Dooley Cc: Conor Dooley , Alessandro Zummo , Alexandre Belloni , Daniel Palmer , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 14 Sep 2023 04:32:09 -0700 (PDT) X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Le jeu. 14 sept. 2023 =C3=A0 10:28, Conor Dooley a =C3=A9crit : > > On Thu, Sep 14, 2023 at 09:08:52AM +0200, Romain Perier wrote: > > Le mer. 13 sept. 2023 =C3=A0 20:30, Conor Dooley a = =C3=A9crit : > > > > > > On Wed, Sep 13, 2023 at 05:16:05PM +0200, Romain Perier wrote: > > > > Add YAML bindings for Mstar SSD202D RTC. > > > > > > > > Signed-off-by: Romain Perier > > > > --- > > > > .../bindings/rtc/mstar,ssd202d-rtc.yaml | 35 +++++++++++++++= ++++ > > > > 1 file changed, 35 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/rtc/mstar,ssd= 202d-rtc.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/rtc/mstar,ssd202d-rt= c.yaml b/Documentation/devicetree/bindings/rtc/mstar,ssd202d-rtc.yaml > > > > new file mode 100644 > > > > index 000000000000..4c1f22ef5a2c > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/rtc/mstar,ssd202d-rtc.yaml > > > > @@ -0,0 +1,35 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > +%YAML 1.2 > > > > +--- > > > > +$id: http://devicetree.org/schemas/rtc/mstar,ssd202d-rtc.yaml# > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > + > > > > +title: Mstar SSD202D Real Time Clock > > > > + > > > > +maintainers: > > > > + - Daniel Palmer > > > > + - Romain Perier > > > > + > > > > +allOf: > > > > + - $ref: rtc.yaml# > > > > + > > > > +properties: > > > > + compatible: > > > > + enum: > > > > + - mstar,ssd202d-rtc > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > +required: > > > > + - compatible > > > > + - reg > > > > > > > Hi, > > > > > So, this seems fine to me in isolation, but isn't this now the sort o= f > > > thing that can be documented in trivial-rtc.yaml? > > > Its only got compatible & reg, which seems to fit the bill for that. > > > > > > > With the current state, it might make sense. However, currently, the > > RTC hw block is mostly > > reverse-engineered, the driver is not complete yet, things like > > external irq or wakeup irq might arrive later (once we know how it is > > wired up and used). > > So the content of the dt-bindings might change and differ from a > > simple "compatible & reg" requirement. > > It's always possible to move from that to a fully fledged binding at a > later date. re: interrupts, trivial-rtc permits a single interrupt, so > it'd still be suitable if the device only has one. I agree, good point. Yes, we can make the change later, sure. I will fix it in the next patch series. Thanks, Romain