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[209.85.222.170]) by smtp.gmail.com with ESMTPSA id a27-20020a05620a125b00b0076f16a00693sm1038854qkl.47.2023.09.15.00.13.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 Sep 2023 00:13:48 -0700 (PDT) Received: by mail-qk1-f170.google.com with SMTP id af79cd13be357-773a0f36b4bso90739485a.0; Fri, 15 Sep 2023 00:13:48 -0700 (PDT) X-Received: by 2002:a25:dcc3:0:b0:d62:6514:45b7 with SMTP id y186-20020a25dcc3000000b00d62651445b7mr319109ybe.37.1694761562659; Fri, 15 Sep 2023 00:06:02 -0700 (PDT) MIME-Version: 1.0 References: <20230912045157.177966-1-claudiu.beznea.uj@bp.renesas.com> <20230912045157.177966-13-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Fri, 15 Sep 2023 09:05:48 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 12/37] clk: renesas: rzg2l: reduce the critical area To: claudiu beznea Cc: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, ulf.hansson@linaro.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com, quic_bjorande@quicinc.com, arnd@arndb.de, konrad.dybcio@linaro.org, neil.armstrong@linaro.org, nfraprado@collabora.com, rafal@milecki.pl, wsa+renesas@sang-engineering.com, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Fri, 15 Sep 2023 00:14:07 -0700 (PDT) Hi Claudiu, On Fri, Sep 15, 2023 at 7:51 AM claudiu beznea wrote: > On 14.09.2023 16:12, Geert Uytterhoeven wrote: > > On Tue, Sep 12, 2023 at 6:52 AM Claudiu wrote: > >> From: Claudiu Beznea > >> > >> spinlock in rzg2l_mod_clock_endisable() is intended to protect the accesses > >> to hardware register. There is no need to protect the instructions that set > >> temporary variable which will be then written to register. Thus limit the > >> spinlock only to the hardware register access. > >> > >> Signed-off-by: Claudiu Beznea > > > > Thanks for your patch! > > > >> --- a/drivers/clk/renesas/rzg2l-cpg.c > >> +++ b/drivers/clk/renesas/rzg2l-cpg.c > >> @@ -912,13 +912,13 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) > >> > >> dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, > >> enable ? "ON" : "OFF"); > >> - spin_lock_irqsave(&priv->rmw_lock, flags); > >> > >> value = bitmask << 16; > >> if (enable) > >> value |= bitmask; > >> - writel(value, priv->base + CLK_ON_R(reg)); > >> > >> + spin_lock_irqsave(&priv->rmw_lock, flags); > >> + writel(value, priv->base + CLK_ON_R(reg)); > >> spin_unlock_irqrestore(&priv->rmw_lock, flags); > > > > After this, it becomes obvious there is nothing to protect at all, > > so the locking can just be removed from this function? > > I tend to be paranoid when writing to hardware resources thus I kept it. > Would you prefer to remove it at all? Yes please. I guess this was copied from R-Car and friends, where there is a RMW operation on an MSTPCR register. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds