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Fri, 15 Sep 2023 00:42:43 -0700 (PDT) Message-ID: <9b72b8a7-be18-8014-f1b6-46cbef1e3d6f@linaro.org> Date: Fri, 15 Sep 2023 09:42:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 Subject: Re: [PATCH 21/37] dt-bindings: clock: add r9a08g045 CPG clocks and resets definitions Content-Language: en-US To: Geert Uytterhoeven Cc: Rob Herring , Claudiu , mturquette@baylibre.com, sboyd@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, ulf.hansson@linaro.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com, quic_bjorande@quicinc.com, arnd@arndb.de, konrad.dybcio@linaro.org, neil.armstrong@linaro.org, nfraprado@collabora.com, rafal@milecki.pl, wsa+renesas@sang-engineering.com, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea References: <20230912045157.177966-1-claudiu.beznea.uj@bp.renesas.com> <20230912045157.177966-22-claudiu.beznea.uj@bp.renesas.com> <20230912160330.GA864606-robh@kernel.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.3 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Fri, 15 Sep 2023 00:42:56 -0700 (PDT) On 15/09/2023 09:38, Geert Uytterhoeven wrote: > Hi Krzysztof, > > On Fri, Sep 15, 2023 at 9:24 AM Krzysztof Kozlowski > wrote: >> On 14/09/2023 17:26, Geert Uytterhoeven wrote: >>> On Tue, Sep 12, 2023 at 6:03 PM Rob Herring wrote: >>>> On Tue, Sep 12, 2023 at 07:51:41AM +0300, Claudiu wrote: >>>>> From: Claudiu Beznea >>>>> >>>>> Add RZ/G3S (R9A08G045) Clock Pulse Generator (CPG) core clocks, module >>>>> clocks and resets. >>>> >>>> This is part of the binding, so it can be squashed with the previous >>>> patch. The ack there still stands. >>> >>> Usually we keep it as a separate patch, to be queued in an immutable >>> branch, as it is included by both the clock driver and by DTS, but >>> not by the yaml bindings file. >> >> Binding also should be shared, so you get compatible documented in both >> places (thus lack of checkpatch warnings). It still should be one patch. > > Hmm, I see your point... > > For core Renesas SoCs components where I am (sub)maintainer for both > the driver subsystem and the DTS, I can take care of that. > For the generic case, that will need a lot of cooperation with subsystem > maintainers, to create lots of small immutable branches with DT bindings > and DT binding definition updates. Wait, I think I was too vague. "Binding also should be shared..." s/should/can/ I did not want to say that every time bindings should be shared, but rather that if already sharing the headers, you can share the bindings and you will get benefits - happy checkpatch in both places. > > Alternatively, are you (the DT maintainers) prepared to handle all > DT bindings and DT binding definition updates, and create immutable > branches for all of them (in a timely manner, of course)? > Then we can start enforcing the rule that driver and DTS updates must > not cause checkpatch warnings for missing compatible values, and must > not be applied without merging the corresponding immutable branch first. I don't think we are ready for any of this, but it is just my incorrect English or too fast typing before :) Best regards, Krzysztof