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Date:   Fri, 15 Sep 2023 08:25:21 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Wang Chen <unicornxw@gmail.com>
CC:     <linux-riscv@lists.infradead.org>, <conor@kernel.org>,
        <aou@eecs.berkeley.edu>, <krzysztof.kozlowski+dt@linaro.org>,
        <palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
        <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <jszhang@kernel.org>,
        <guoren@kernel.org>, <chao.wei@sophgo.com>,
        <xiaoguang.xing@sophgo.com>, Wang Chen <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH 00/12] Add Milk-V Pioneer RISC-V board support
Message-ID: <20230915-dill-gauze-922068730d7b@wendy>
References: <20230915070856.117514-1-wangchen20@iscas.ac.cn>
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Hey,

On Fri, Sep 15, 2023 at 03:08:56PM +0800, Wang Chen wrote:
> Milk-V Pioneer [1] is a developer motherboard based on SOPHON SG2042 [2]
> in a standard mATX form factor. Add minimal device
> tree files for the SG2042 SOC and the Milk-V Pioneer board.

Cool, thanks for working on this.

>=20
> Now only support basic uart drivers to boot up into a basic console.
>=20
> The patch series is based on v6.6-rc1. You can simply review or test=20
> the patches at the link [3]. Hope this series will be merged soon.
>=20
> Thanks
>=20
> [1]: https://milkv.io/pioneer
> [2]: https://en.sophgo.com/product/introduce/sg2042.html
> [3]: https://github.com/unicornx/linux-riscv/commits/milkv-pioneer-minimal
>=20
> Emil Renner Berthing (2):
>   dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
>   serial: 8250_dw: Add Sophgo SG2042 support
>=20
> Inochi Amaoto (1):
>   dt-bindings: timer: Add Sophgo sg2042 clint
>=20
> Wang Chen (8):
>   dt-bindings: vendor-prefixes: add milkv/sophgo
>   dt-bindings: riscv: add sophgo sg2042 bindings
>   dt-bindings: riscv: Add T-HEAD C920 compatibles
>   dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC
>   riscv: dts: add initial SOPHGO SG2042 SoC device tree
>   riscv: dts: sophgo: add Milk-V Pioneer board device tree
>   riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles
>   riscv: defconfig: enable SOPHGO SoC
>=20
> xiaoguang.xing (1):
>   riscv: Add SOPHGO SOC family Kconfig support

One thing on sending patchsets - you've not threaded this patchset,
where each patch is a reply to the cover letter. This makes it more
difficult to apply the series as a human & ~impossible for the
automation to test correctly.
Git should do this for you if run send-email on an entire directory,
or you can pass the message-id of the cover letter with an argument.
The first option is likely a lot easier for you...

Thanks,
Conor.

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