Received: by 2002:a05:7412:31a9:b0:e2:908c:2ebd with SMTP id et41csp4478637rdb; Fri, 15 Sep 2023 03:40:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG/bmvjELZMuzekquNztn1wbOjIXW1ZzB96+jqDYK136JuqJr7mNjhRzMMb4fyq8Gjx5sgM X-Received: by 2002:a05:6870:b50b:b0:1d5:8c26:74e5 with SMTP id v11-20020a056870b50b00b001d58c2674e5mr1408723oap.10.1694774438444; Fri, 15 Sep 2023 03:40:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1694774438; cv=none; d=google.com; s=arc-20160816; b=DpBtfq49lwEIkXsSW0A9Oj3lEEXeVjJi5de1vTt24YEh5PWH493t6AayBYJGGEQkfy q6OISVOHQSYfGh+vNbq64iWy+d7REmNBiiIARnFFzskhvO7ZSBDwXHAQXCFevDkzdY4g 4n7ULlpVVLQqahMYseYNWgc13lW36BPkPruqUUZHWbrCmavgBYAnpb/x2f3AUzPn/yX9 vTihbtt1co4aWCyiUY5nX3SVGXt4qpS2xkgjwBWduYUqVIqsfW50imzTbHDtys73+p8F AF/UaFDc7KjsmUyMLXwJuPKEhrORn9x1pWbRult7dPwYIoVCDj2tAFX+X9LhYEydc/tW AEPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id; bh=vKEPOtDSovoG867+ldcLQcXahcn1Tr/kcnkW92cycBw=; fh=loTaRZUxLEJ5JMEOHtwdWSnwSs50Xb9xJXH3SoGZSPQ=; b=DAkRWVDLj5UfFQpl+mcTtBOW9mhw99AU7r1N/s8mOv84JNeT7GEuzvZfavpudM/v3i FIMfTl/QSTwq7tpKfosKo7PeRyn6UVQgoep4IBGE1srRzSgoL1avDQVo8hQTlNHRtjlP zP7q6K7crE3nzyI3sai4Xnf2654ipRwndWCQ515vcSBfDiH2SUF/KcwOJ+qoKz8qsn23 OU6+xfXr5vPNX5dLKeHY93q9tIzF+cDsEwCFI291anoLUr2g72P60egRp6YiOk6dSuV4 nYnbVUe+/GvYyJDSUqQLisUbRgkKNzcGmtuc75RcsrCSJ6ctKubk6BajFbqS6eEyPEI6 QYJQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id t17-20020a63d251000000b0055c81ab9a9fsi3055007pgi.582.2023.09.15.03.40.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 03:40:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 555F082D1C0D; Fri, 15 Sep 2023 03:33:37 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232297AbjIOKdd (ORCPT + 99 others); Fri, 15 Sep 2023 06:33:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229527AbjIOKdc (ORCPT ); Fri, 15 Sep 2023 06:33:32 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BFF294; Fri, 15 Sep 2023 03:33:26 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 39BBE7FEF; Fri, 15 Sep 2023 18:33:25 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 15 Sep 2023 18:33:25 +0800 Received: from [192.168.125.57] (113.72.144.67) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 15 Sep 2023 18:33:23 +0800 Message-ID: <88ba051e-040c-4ff0-1cb0-2b6f01cb950c@starfivetech.com> Date: Fri, 15 Sep 2023 18:33:18 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v6 0/19] Refactoring Microchip PCIe driver and add StarFive PCIe To: Daire McNamara , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Emil Renner Berthing CC: , , , , =?UTF-8?Q?Pali_Roh=c3=a1r?= , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie References: <20230915102243.59775-1-minda.chen@starfivetech.com> Content-Language: en-US From: Minda Chen In-Reply-To: <20230915102243.59775-1-minda.chen@starfivetech.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [113.72.144.67] X-ClientProxiedBy: EXCAS061.cuchost.com (172.16.6.21) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-2.2 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Fri, 15 Sep 2023 03:33:37 -0700 (PDT) On 2023/9/15 18:22, Minda Chen wrote: > This patchset final purpose is add PCIe driver for StarFive JH7110 SoC. > JH7110 using PLDA XpressRICH PCIe IP. Microchip PolarFire Using the > same IP and have commit their codes, which are mixed with PLDA > controller codes and Microchip platform codes. > > For re-use the PLDA controller codes, I request refactoring microchip > codes, move PLDA common codes to PLDA files. > Desigware and Cadence is good example for refactoring codes. > > So first step is extract the PLDA common codes from microchip, and > refactoring the microchip codes.(patch1 - 16) > Then, add Starfive codes. (patch17 - 19) > > This patchset is base on v6.6-rc1 > > patch1 is move PLDA XpressRICH PCIe host common properties dt-binding > docs from microchip,pcie-host.yaml > patch2 is move PolarFire codes to PLDA directory. > patch3 is move PLDA IP register macros to plda-pcie.h > patch4 is rename data structure in microchip codes. > patch5 is rename two setup functions in microchip codes, prepare to move > to common file. > patch6 is change the arguments of plda_pcie_setup_iomems() > patch7 is move the two setup functions to common file pcie-plda-host.c > patch8 is Add PLDA event interrupt codes and IRQ domain ops. > patch9 is rename the IRQ related functions, prepare to move to > pcie-plda-host. > patch10 - 14 is modify the event codes, preparing for support starfive > and microchip two platforms. > patch15 is move IRQ related functions to pcie-plda-host.c > patch16 is set plda_event_handler to static. > patch17 is add StarFive JH7110 PCIe dt-binding doc. > patch18 is add StarFive JH7110 Soc PCIe codes. > patch19 is Starfive dts config > > previous version: > v1:https://patchwork.kernel.org/project/linux-pci/cover/20230719102057.22329-1-minda.chen@starfivetech.com/ > v2:https://patchwork.kernel.org/project/linux-pci/cover/20230727103949.26149-1-minda.chen@starfivetech.com/ > v3:https://patchwork.kernel.org/project/linux-pci/cover/20230814082016.104181-1-minda.chen@starfivetech.com/ > v4:https://patchwork.kernel.org/project/linux-pci/cover/20230825090129.65721-1-minda.chen@starfivetech.com/ > v5:https://patchwork.kernel.org/project/linux-pci/cover/20230907091058.125630-1-minda.chen@starfivetech.com/ > > change: > v6: > v5 patch 4 split to patch 4 -6. New patches just contain one > function modification. It is more reguluar. > patch 7: Just move the two setup functions only > patch 8 : draw a graph of PLDA local register, make it easier to > review the codes. > v5 patch 7 split to patch 9- 14. Each patch just contain one > function modification. It is more regular. > patch 9: rename IRQ related functions. > patch 10 - 14 : modify the events codes, total five patch. > patch 15: move IRQ related functions to pcie-plda-host.c > patch 16: Add new patch 16. > patch 18- 19 using "linux,pci-domain" dts setting. > Hi Bjorn I have noticed that the previous patches of refactoring codes is not so regular( the patched of modify Microchip' codes), and you don't give any comment to the patches. Now this verison is more regular and easier to review. Could you please review the driver codes? Hi Conor and Daire Thanks for reviewing. Now I split more patches and make it easier to review.