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Thu, 14 Sep 2023 11:13:40 -0700 (PDT) -----Original Message----- From: Will Deacon =20 Sent: Thursday, September 14, 2023 6:22 AM To: Pawandeep Oza (QUIC) Cc: sudeep.holla@arm.com; catalin.marinas@arm.com; rafael@kernel.org; lenb@= kernel.org; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.= org; linux-acpi@vger.kernel.org Subject: Re: [PATCH v5] cpuidle, ACPI: Evaluate LPI arch_flags for broadcas= t timer On Tue, Sep 12, 2023 at 10:29:33AM -0700, Oza Pawandeep wrote: > Arm(r) Functional Fixed Hardware Specification defines LPI states, which= =20 > provide an architectural context loss flags field that can be used to=20 > describe the context that might be lost when an LPI state is entered. >=20 > - Core context Lost > - General purpose registers. > - Floating point and SIMD registers. > - System registers, include the System register based > - generic timer for the core. > - Debug register in the core power domain. > - PMU registers in the core power domain. > - Trace register in the core power domain. > - Trace context loss > - GICR > - GICD >=20 > Qualcomm's custom CPUs preserves the architectural state, including=20 > keeping the power domain for local timers active. > when core is power gated, the local timers are sufficient to wake the=20 > core up without needing broadcast timer. >=20 > The patch fixes the evaluation of cpuidle arch_flags, and moves only=20 > to broadcast timer if core context lost is defined in ACPI LPI. >=20 > Reviewed-by: Sudeep Holla > Signed-off-by: Oza Pawandeep >=20 > diff --git a/arch/arm64/include/asm/acpi.h=20 > b/arch/arm64/include/asm/acpi.h index 4d537d56eb84..a30b6e16628d=20 > 100644 > --- a/arch/arm64/include/asm/acpi.h > +++ b/arch/arm64/include/asm/acpi.h > @@ -9,6 +9,7 @@ > #ifndef _ASM_ACPI_H > #define _ASM_ACPI_H > =20 > +#include > #include > #include > #include > @@ -44,6 +45,25 @@ > =20 > #define ACPI_MADT_GICC_TRBE (offsetof(struct acpi_madt_generic_interrup= t, \ > trbe_interrupt) + sizeof(u16)) > +/* > + * Arm(r) Functional Fixed Hardware Specification Version 1.2. > + * Table 2: Arm Architecture context loss flags */ > +#define CPUIDLE_CORE_CTXT BIT(0) /* Core context Lost */ > + > +#ifndef arch_update_idle_state_flags > +static __always_inline void _arch_update_idle_state_flags(u32 arch_flags= , > + unsigned int *sflags) > +{ > + if (arch_flags & CPUIDLE_CORE_CTXT) > + *sflags |=3D CPUIDLE_FLAG_TIMER_STOP; } #define=20 > +arch_update_idle_state_flags _arch_update_idle_state_flags #endif Why do you need the #ifndef/endif guards here? I'd have thought you'd _alwa= ys_ want this definition to be the one used, with the compiler complaining = otherwise. Oza: thanks, Will!, will remove it. Will