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[209.85.128.174]) by smtp.gmail.com with ESMTPSA id p4-20020a0dff04000000b005837b48d16csm2548593ywf.84.2023.09.18.05.57.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 Sep 2023 05:57:29 -0700 (PDT) Received: by mail-yw1-f174.google.com with SMTP id 00721157ae682-59c0281d72dso35302897b3.0; Mon, 18 Sep 2023 05:57:29 -0700 (PDT) X-Received: by 2002:a81:4e4f:0:b0:56c:f32d:1753 with SMTP id c76-20020a814e4f000000b0056cf32d1753mr9477356ywb.44.1695041849132; Mon, 18 Sep 2023 05:57:29 -0700 (PDT) MIME-Version: 1.0 References: <20230918123355.262115-1-biju.das.jz@bp.renesas.com> <20230918123355.262115-3-biju.das.jz@bp.renesas.com> In-Reply-To: <20230918123355.262115-3-biju.das.jz@bp.renesas.com> From: Geert Uytterhoeven Date: Mon, 18 Sep 2023 14:57:17 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/2] pinctrl: renesas: rzg2l: Enable noise filter for GPIO interrupt input To: Biju Das Cc: Linus Walleij , Claudiu Beznea , Lad Prabhakar , Marc Zyngier , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Biju Das Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Mon, 18 Sep 2023 05:58:35 -0700 (PDT) Hi Biju, On Mon, Sep 18, 2023 at 2:34 PM Biju Das wrote: > As per RZ/G2L hardware manual Rev.1.30 section 8.7.3 GPIO Interrupt (TINT) > and 41.4.1 Operation for GPIO function, we need to set digital noise > filter for GPIO interrupt. > > This patch enables noise filter for GPIO interrupt in > rzg2l_gpio_irq_enable() and disable it in rzg2l_gpio_irq_disable(). > > Fixes: db2e5f21a48e ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt") > Signed-off-by: Biju Das > Tested-by: Claudiu Beznea Thanks for your patch! > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > @@ -96,6 +96,7 @@ > #define PIN(n) (0x0800 + 0x10 + (n)) > #define IOLH(n) (0x1000 + (n) * 8) > #define IEN(n) (0x1800 + (n) * 8) > +#define FILONOFF(n) (0x2080 + (n) * 8) > #define ISEL(n) (0x2c80 + (n) * 8) > #define PWPR (0x3014) > #define SD_CH(n) (0x3000 + (n) * 4) LGTM, but shouldn't you configure the Digital Noise Filter Number (FILNUM) and Clock Selection (FILCLKSEL) registers, too? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds