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From:   Larry Lai <larry.lai@yunjingtech.com>
To:     Linus Walleij <linus.walleij@linaro.org>
CC:     "lee@kernel.org" <lee@kernel.org>,
        "andriy.shevchenko@linux.intel.com" 
        <andriy.shevchenko@linux.intel.com>, "pavel@ucw.cz" <pavel@ucw.cz>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
        "linux-leds@vger.kernel.org" <linux-leds@vger.kernel.org>,
        "GaryWang@aaeon.com.tw" <GaryWang@aaeon.com.tw>,
        Musa Lin <musa.lin@yunjingtech.com>,
        Jack Chang <jack.chang@yunjingtech.com>,
        Noah Hung <noah.hung@yunjingtech.com>
Subject: =?utf-8?B?5Zue6KaGOiBbUEFUQ0ggVjYgMi8zXSBwaW5jdHJsOiBBZGQgc3VwcG9ydCBw?=
 =?utf-8?Q?in_control_for_UP_board_CPLD/FPGA?=
Thread-Topic: [PATCH V6 2/3] pinctrl: Add support pin control for UP board
 CPLD/FPGA
Thread-Index: AQHZ54JpDX/LFt2hHkC8+IcGhRzYgLAbl4+AgAZYWxk=
Date:   Tue, 19 Sep 2023 10:10:55 +0000
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References: <20230915031123.14515-1-larry.lai@yunjingtech.com>
 <20230915031123.14515-3-larry.lai@yunjingtech.com>
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