Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33;
From:   David Laight <David.Laight@ACULAB.COM>
To:     'Matthew Wilcox' <willy@infradead.org>
CC:     Greg Ungerer <gregungerer@westnet.com.au>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-fsdevel@vger.kernel.org" <linux-fsdevel@vger.kernel.org>,
        "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
        "torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
        Nicholas Piggin <npiggin@gmail.com>
Subject: RE: [PATCH 09/17] m68k: Implement xor_unlock_is_negative_byte
Thread-Topic: [PATCH 09/17] m68k: Implement xor_unlock_is_negative_byte
Thread-Index: AQHZ6Kr+hLdybFnA00ugx5L/MFgM8bAiJxPQgAABTgCAABHZMP//+8IAgAARftD///eTgIAAEctA
Date:   Tue, 19 Sep 2023 15:57:36 +0000
Message-ID: <bfbf4d9ae5674d5dbe8c509abf5b0f84@AcuMS.aculab.com>
References: <20230915183707.2707298-1-willy@infradead.org>
 <20230915183707.2707298-10-willy@infradead.org>
 <6e409d5f-a419-07b7-c82c-4e80fe19c6ba@westnet.com.au>
 <ZQW849TfSCK6u2f8@casper.infradead.org>
 <e1fb697714ac408e85c4e3dc573cd7d5@AcuMS.aculab.com>
 <ZQmvhC+pGWNs9R23@casper.infradead.org>
 <cffc2a427ae74f62b07345ec9348e43e@AcuMS.aculab.com>
 <ZQm67lGOBBdC2Dl9@casper.infradead.org>
 <c61a58a1f5a34f2b96c6043840635197@AcuMS.aculab.com>
 <ZQnCiZuMbFnwbEUt@casper.infradead.org>
In-Reply-To: <ZQnCiZuMbFnwbEUt@casper.infradead.org>
Accept-Language: en-GB, en-US
MIME-Version: 1.0
Content-Language: en-US
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8BIT
Precedence: bulk

From: Matthew Wilcox
> Sent: 19 September 2023 16:47
> 
> On Tue, Sep 19, 2023 at 03:22:25PM +0000, David Laight wrote:
> > > Anyway, that's not the brief.  We're looking to (eg) clear bit 0
> > > and test whether bit 7 was set.  So it's the sign bit of the byte,
> > > not the sign bit of the int.
> >
> > Use the address of the byte as an int and xor with 1u<<24.
> > The xor will do a rmw on the three bytes following, but I
> > doubt that matters.
> 
> Bet you a shiny penny that Coldfire takes an unaligned access trap ...

and then the 'firmware' silently fixed it up for you a few 1000
clocks later...

> and besides, this is done on _every_ call to unlock_page().  That might
> cross not only a cacheline boundary but also a page boundary.  I cannot
> believe that would be a high-performing solution.  It might be just fine
> on m68000 but I bet even by the 030 it's lower performing.

I do remember managing to use 'cas2' to add an item to a linked list.
But it is so painful so setup it was better just to disable interrupts.
For non-smp that is almost certainly ok.
(Unless the instructions are slow because of synchronisation.)
Otherwise you need to use 'cas' on the aligned word.
Assuming coldfire even has cas.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)