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Date:   Tue, 19 Sep 2023 14:54:47 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Parthiban.Veerasooran@microchip.com
Cc:     davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
        pabeni@redhat.com, robh+dt@kernel.org,
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        rdunlap@infradead.org, horms@kernel.org, casper.casan@gmail.com,
        netdev@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
        Horatiu.Vultur@microchip.com, Woojung.Huh@microchip.com,
        Nicolas.Ferre@microchip.com, UNGLinuxDriver@microchip.com,
        Thorsten.Kummermehr@microchip.com
Subject: Re: [RFC PATCH net-next 3/6] net: ethernet: implement OA TC6
 configuration function
Message-ID: <d2d26c6c-0345-46cf-b806-15834ba8b40f@lunn.ch>
References: <20230908142919.14849-1-Parthiban.Veerasooran@microchip.com>
 <20230908142919.14849-4-Parthiban.Veerasooran@microchip.com>
 <dd0a6cd5-91e5-4e13-8025-d6c88bdab5a2@lunn.ch>
 <46fab729-4c5a-1a6e-37d0-fea62c0717f7@microchip.com>
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> >> +/* Unmasking interrupt fields in IMASK0 */
> >> +#define HDREM                ~BIT(5)         /* Header Error Mask */
> >> +#define LOFEM                ~BIT(4)         /* Loss of Framing Error Mask */
> >> +#define RXBOEM               ~BIT(3)         /* Rx Buffer Overflow Error Mask */
> >> +#define TXBUEM               ~BIT(2)         /* Tx Buffer Underflow Error Mask */
> >> +#define TXBOEM               ~BIT(1)         /* Tx Buffer Overflow Error Mask */
> >> +#define TXPEM                ~BIT(0)         /* Tx Protocol Error Mask */
> > 
> > Using ~BIT(X) is very usual. I would not do this, Principle of Least
> > Surprise.
> Sorry, I don't get your point. Could you please explain bit more?

Look around kernel header files. How often do you see ~BIT(5)?  My
guess it is approximately 0. So i'm suggesting you remove the ~ and
have the user of the #define assemble the mask and then do the ~ .

     Andrew