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From:   Ming Qian <ming.qian@nxp.com>
To:     Shawn Guo <shawnguo@kernel.org>
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Subject: RE: [EXT] Re: [PATCH] arm64: dts: imx8-ss-img: Assign slot for imx
 jpeg encoder/decoder
Thread-Topic: [EXT] Re: [PATCH] arm64: dts: imx8-ss-img: Assign slot for imx
 jpeg encoder/decoder
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Date:   Wed, 20 Sep 2023 02:29:30 +0000
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 <20230919122602.GC11740@T480>
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>> assign a single slot,
>> configure interrupt and power domain only for 1 slot, not for the all
>> 4 slots.
>>
>> Signed-off-by: Ming Qian <ming.qian@nxp.com>
>> ---
>>  .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22
>> +++++--------------
>>  1 file changed, 6 insertions(+), 16 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> index a90654155a88..176dcce24b64 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> @@ -18,10 +18,7 @@ img_ipg_clk: clock-img-ipg {
>>
>>       jpegdec: jpegdec@58400000 {
>>               reg =3D <0x58400000 0x00050000>;
>> -             interrupts =3D <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
>> +             interrupts =3D <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
>>               clocks =3D <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
>>                        <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>>               clock-names =3D "per", "ipg"; @@ -29,18 +26,13 @@ jpegdec:
>> jpegdec@58400000 {
>>                                 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>>               assigned-clock-rates =3D <200000000>, <200000000>;
>>               power-domains =3D <&pd IMX_SC_R_MJPEG_DEC_MP>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S0>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S1>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S2>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S3>;
>> +                             <&pd IMX_SC_R_MJPEG_DEC_S0>;
>> +             slot =3D <0>;
>
>I do not find this 'slot' property in bindings doc.

I'll add it in v2

>
>Shawn
>
>>       };
>>
>>       jpegenc: jpegenc@58450000 {
>>               reg =3D <0x58450000 0x00050000>;
>> -             interrupts =3D <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
>> +             interrupts =3D <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
>>               clocks =3D <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
>>                        <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>>               clock-names =3D "per", "ipg"; @@ -48,10 +40,8 @@ jpegenc:
>> jpegenc@58450000 {
>>                                 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>>               assigned-clock-rates =3D <200000000>, <200000000>;
>>               power-domains =3D <&pd IMX_SC_R_MJPEG_ENC_MP>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S0>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S1>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S2>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S3>;
>> +                             <&pd IMX_SC_R_MJPEG_ENC_S0>;
>> +             slot =3D <0>;
>>       };
>>
>>       img_jpeg_dec_lpcg: clock-controller@585d0000 {
>> --
>> 2.38.1
>>