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[23.128.96.32]) by mx.google.com with ESMTPS id g7-20020a056a0023c700b006902507d409si11732857pfc.174.2023.09.20.01.02.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 01:02:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Qcrm7xRp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id C775281DEED9; Wed, 20 Sep 2023 00:54:19 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233243AbjITHyU (ORCPT + 99 others); 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Wed, 20 Sep 2023 00:54:08 -0700 (PDT) X-Gm-Message-State: AOJu0YwUJTh6oTITiwRXQIJH6CArGr5r0/jNjrhJo4cR9brXMb2pLKYr 8p7ztfBk6QAIYqmM+mOI+OANFLqb1+6adYj34Eg= X-Received: by 2002:a05:651c:1034:b0:2bc:d8cb:5a13 with SMTP id w20-20020a05651c103400b002bcd8cb5a13mr1419793ljm.42.1695196446802; Wed, 20 Sep 2023 00:54:06 -0700 (PDT) MIME-Version: 1.0 References: <888d57a2d5e62affb8e29e0098402e428facd969.1695189879.git.wangchen20@iscas.ac.cn> In-Reply-To: <888d57a2d5e62affb8e29e0098402e428facd969.1695189879.git.wangchen20@iscas.ac.cn> From: Guo Ren Date: Wed, 20 Sep 2023 15:53:53 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support To: Chen Wang Cc: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, devicetree@vger.kernel.org, emil.renner.berthing@canonical.com, jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org, xiaoguang.xing@sophgo.com, Chen Wang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 20 Sep 2023 00:54:19 -0700 (PDT) On Wed, Sep 20, 2023 at 2:40=E2=80=AFPM Chen Wang wro= te: > > From: Emil Renner Berthing > > Add quirk to skip setting the input clock rate for the uarts on the > Sophgo SG2042 SoC similar to the StarFive JH7100. > > Signed-off-by: Emil Renner Berthing > Signed-off-by: Chen Wang > --- > drivers/tty/serial/8250/8250_dw.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/= 8250_dw.c > index f4cafca1a7da..6c344877a07f 100644 > --- a/drivers/tty/serial/8250/8250_dw.c > +++ b/drivers/tty/serial/8250/8250_dw.c > @@ -770,7 +770,7 @@ static const struct dw8250_platform_data dw8250_renes= as_rzn1_data =3D { > .quirks =3D DW_UART_QUIRK_IS_DMA_FC, > }; > > -static const struct dw8250_platform_data dw8250_starfive_jh7100_data =3D= { > +static const struct dw8250_platform_data dw8250_skip_set_rate_data =3D { > .usr_reg =3D DW_UART_USR, > .quirks =3D DW_UART_QUIRK_SKIP_SET_RATE, > }; > @@ -780,7 +780,8 @@ static const struct of_device_id dw8250_of_match[] = =3D { > { .compatible =3D "cavium,octeon-3860-uart", .data =3D &dw8250_oc= teon_3860_data }, > { .compatible =3D "marvell,armada-38x-uart", .data =3D &dw8250_ar= mada_38x_data }, > { .compatible =3D "renesas,rzn1-uart", .data =3D &dw8250_renesas_= rzn1_data }, > - { .compatible =3D "starfive,jh7100-uart", .data =3D &dw8250_starf= ive_jh7100_data }, > + { .compatible =3D "sophgo,sg2042-uart", .data =3D &dw8250_skip_se= t_rate_data }, > + { .compatible =3D "starfive,jh7100-uart", .data =3D &dw8250_skip_= set_rate_data }, Why shall we touch the jh7100 stuff in this patch? > { /* Sentinel */ } > }; > MODULE_DEVICE_TABLE(of, dw8250_of_match); > -- > 2.25.1 > --=20 Best Regards Guo Ren