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Message-ID: <e29f83cc-6a00-0e5a-20ca-55d39dc2e3a3@arm.com>
Date:   Wed, 20 Sep 2023 10:22:33 +0100
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Subject: Re: [PATCH V5 - RESEND 2/3] coresight: etm: Make cycle count
 threshold user configurable
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To:     Anshuman Khandual <anshuman.khandual@arm.com>,
        linux-arm-kernel@lists.infradead.org
Cc:     Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Mike Leach <mike.leach@linaro.org>,
        James Clark <james.clark@arm.com>,
        Leo Yan <leo.yan@linaro.org>, Jonathan Corbet <corbet@lwn.net>,
        linux-doc@vger.kernel.org, coresight@lists.linaro.org,
        linux-kernel@vger.kernel.org
References: <20230915093649.435163-1-anshuman.khandual@arm.com>
 <20230915093649.435163-3-anshuman.khandual@arm.com>
From:   Suzuki K Poulose <suzuki.poulose@arm.com>
In-Reply-To: <20230915093649.435163-3-anshuman.khandual@arm.com>
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On 15/09/2023 10:36, Anshuman Khandual wrote:
> Cycle counting is enabled, when requested and supported but with a default
> threshold value ETM_CYC_THRESHOLD_DEFAULT i.e 0x100 getting into TRCCCCTLR,
> representing the minimum interval between cycle count trace packets.

minor nit:

When Cycle counting is enabled, we use a default threshold value (0x100) 
for the instruction trace cycle counting.
> 
> This makes cycle threshold user configurable, from the user space via perf
> event attributes. Although it falls back using ETM_CYC_THRESHOLD_DEFAULT,
> in case no explicit request.

Minor nit:

This patch makes the cycle threshold user configurable via perf event
attributes( 'cc_threshold' => event->attr.config3[11:0] ), falling back
to the the current default if unspecified.


> As expected it creates a sysfs file as well.


> 
> /sys/bus/event_source/devices/cs_etm/format/cc_threshold
> 
> New 'cc_threshold' uses 'event->attr.config3' as no more space is available
> in 'event->attr.config1' or 'event->attr.config2'.

Trim the above part.


Rest looks fine to me.

Suzuki