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[23.128.96.31]) by mx.google.com with ESMTPS id cq5-20020a056a00330500b0068e47e5f221si11313455pfb.195.2023.09.20.03.39.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 03:39:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=R9WW70+g; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 366AA823F5F8; Wed, 20 Sep 2023 00:28:05 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233734AbjITH1z (ORCPT + 99 others); Wed, 20 Sep 2023 03:27:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233728AbjITH1y (ORCPT ); Wed, 20 Sep 2023 03:27:54 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF3C3C9 for ; Wed, 20 Sep 2023 00:27:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695194860; x=1726730860; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=c//2mqr4QCDnboufqfxvs3v0ljEejNOYFoTJbE1+at8=; b=R9WW70+gho4pqxFqCzld0/kgaekb54qloIAoeMvIbLX6nNnZuNW8k0Xg tTbVoLrjuseBQjm+CXQUuWjftKTPO5boIEYWnORNyMdZjpQBXkNu5JQ0i UNRTum6fOdO5SiPDpyZdhV1ShUaVK4N8mktoLTzScyMjl7bfq2YPDUXho 5QDjg8Qpmy3bhH/mzeJE2TlLKPyZ6cQuWQfET4HQ0IzsB323wNvRvgF8l 23Nvom41yWbcPZCcDIbY5EBsFBPjbo3s5Q3Zno0Q9f2Zwd3Hl0C2hmeTV 5JyD2EGjjRhSo+iJ7jWpnjupbZ+Ldx3eMUZgJ2inF0+4+86+M7CSxh9c+ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="411088297" X-IronPort-AV: E=Sophos;i="6.02,161,1688454000"; d="scan'208";a="411088297" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Sep 2023 00:27:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="781592828" X-IronPort-AV: E=Sophos;i="6.02,161,1688454000"; d="scan'208";a="781592828" Received: from lingshan-mobl.ccr.corp.intel.com (HELO [10.93.14.5]) ([10.93.14.5]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Sep 2023 00:27:32 -0700 Message-ID: <91c3e7ec-d702-ee61-c420-59ddc8dac6dc@intel.com> Date: Wed, 20 Sep 2023 15:27:30 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Firefox/102.0 Thunderbird/102.15.1 Subject: Re: [virtio-dev] Re: [virtio-comment] Re: [VIRTIO PCI PATCH v5 1/1] transport-pci: Add freeze_mode to virtio_pci_common_cfg Content-Language: en-US To: Parav Pandit , "Chen, Jiqian" , "Michael S. Tsirkin" Cc: Gerd Hoffmann , Jason Wang , Xuan Zhuo , David Airlie , Gurchetan Singh , Chia-I Wu , =?UTF-8?Q?Marc-Andr=c3=a9_Lureau?= , Robert Beckett , Mikhail Golubev-Ciuchea , "virtio-comment@lists.oasis-open.org" , "virtio-dev@lists.oasis-open.org" , "qemu-devel@nongnu.org" , "linux-kernel@vger.kernel.org" , Stefano Stabellini , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= , "Deucher, Alexander" , "Koenig, Christian" , "Hildebrand, Stewart" , Xenia Ragiadakou , "Huang, Honglei1" , "Zhang, Julia" , "Huang, Ray" References: <20230919114242.2283646-1-Jiqian.Chen@amd.com> <20230919114242.2283646-2-Jiqian.Chen@amd.com> <20230919082802-mutt-send-email-mst@kernel.org> <701bb67c-c52d-4eb3-a6ed-f73bd5d0ff33@intel.com> From: "Zhu, Lingshan" In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.3 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Wed, 20 Sep 2023 00:28:05 -0700 (PDT) On 9/20/2023 3:10 PM, Parav Pandit wrote: >> From: Zhu, Lingshan >> Sent: Wednesday, September 20, 2023 12:37 PM >>> The problem to overcome in [1] is, resume operation needs to be synchronous >> as it involves large part of context to resume back, and hence just >> asynchronously setting DRIVER_OK is not enough. >>> The sw must verify back that device has resumed the operation and ready to >> answer requests. >> this is not live migration, all device status and other information still stay in the >> device, no need to "resume" context, just resume running. >> > I am aware that it is not live migration. :) > > "Just resuming" involves lot of device setup task. The device implementation does not know for how long a device is suspended. > So for example, a VM is suspended for 6 hours, hence the device context could be saved in a slow disk. > Hence, when the resume is done, it needs to setup things again and driver got to verify before accessing more from the device. The restore procedures should perform by the hypervisor and done before set DRIVER_OK and wake up the guest. And the hypervisor/driver needs to check the device status by re-reading. > >> Like resume from a failed LM. >>> This is slightly different flow than setting the DRIVER_OK for the first time >> device initialization sequence as it does not involve large restoration. >>> So, to merge two ideas, instead of doing DRIVER_OK to resume, the driver >> should clear the SUSPEND bit and verify that it is out of SUSPEND. >>> Because driver is still in _OK_ driving the device flipping the SUSPEND bit. >> Please read the spec, it says: >> The driver MUST NOT clear a device status bit >> > Yes, this is why either DRIER_OK validation by the driver is needed or Jiqian's synchronous new register.. so re-read >