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[23.128.96.32]) by mx.google.com with ESMTPS id ha8-20020a17090af3c800b00262ecc1963fsi1619401pjb.33.2023.09.20.07.08.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 07:08:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ea+IVKz9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id BBEA6825E4A4; Wed, 20 Sep 2023 06:54:49 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236408AbjITNys (ORCPT + 99 others); Wed, 20 Sep 2023 09:54:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236409AbjITNyp (ORCPT ); Wed, 20 Sep 2023 09:54:45 -0400 Received: from mail-yb1-xb2d.google.com (mail-yb1-xb2d.google.com [IPv6:2607:f8b0:4864:20::b2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B70A4C6 for ; Wed, 20 Sep 2023 06:54:38 -0700 (PDT) Received: by mail-yb1-xb2d.google.com with SMTP id 3f1490d57ef6-d857847be8cso1625189276.0 for ; Wed, 20 Sep 2023 06:54:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695218078; x=1695822878; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=rYSun0Wdmv2UxSSLu5pfbVvQMooLrR2EKUP0Tr60xow=; b=ea+IVKz9zJZdF95klQvVuDM3C0WLFlv/nbqT2c3NS6yyU7AtfON77YulBVAM9Ez9zl 7p1nWqUsvqpWlNmfgCz2zeBa4kIamt9UYxQbtz/kc0DCpwBdeSlbF1Sik/JfIn3Qb/ZA aB0ytQ0ppOhsPWHUeS4XMnBn1QciwrCQZKQyduIth8tFcq5OJxppTY0eyltcwraXLgZI oqSqasQCLFO8gyKDBLPULSor579KPfCN7AUzDYFy3n/zlHagwNqIvas30qifqIs9n4wZ nyL/2uyaSRYNZrVmmdQ+CqY4qKBPolSJWzk8bcOOjQFTU2MyWEcde3lsDD+B55YXb720 Opcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695218078; x=1695822878; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rYSun0Wdmv2UxSSLu5pfbVvQMooLrR2EKUP0Tr60xow=; b=fm1CN6Now4gQFoN8WY/OrBHlFvnM4G13zpD1onX9+X+MS7uBIMKE5S6ML5cDNOHpWt 3iGzGcSbq7Ej/mTIpt62Ubf7d+HxyqpGTx6gGFyZSnpNzAQ6wth/M2JjCUFeYvy6rK5f rUDVheaNFI38exw9RJKuyCgtDUGRpHHZoVTr+zuvk0WK77/GvUrdzIfqVleJT9jft1ZO Z8Javqna+RaPo6Ahohn+viK+CKjam0PWgvpo/AKBMuopsl1o5tLxK6iwMZ89+jaVL0XE Uxax/zxAXeAEkQ1amZDfAZAILRai+grZjTrU8dk4deQozDWsWig1M/WTqdTmYhO47uUp 7Srw== X-Gm-Message-State: AOJu0YyNjpaqGaqd5YxJaodkg+UofjrcWGL/uHgcmA7UsA1b4NcgRMFK +LkpgZV7KVwbVoYz6EzXZsEclCDofe6A91BWPuFlmw== X-Received: by 2002:a25:25c3:0:b0:d78:1b39:fd03 with SMTP id l186-20020a2525c3000000b00d781b39fd03mr2546447ybl.64.1695218077919; Wed, 20 Sep 2023 06:54:37 -0700 (PDT) MIME-Version: 1.0 References: <20230918123355.262115-1-biju.das.jz@bp.renesas.com> <20230918123355.262115-3-biju.das.jz@bp.renesas.com> In-Reply-To: From: Linus Walleij Date: Wed, 20 Sep 2023 15:54:25 +0200 Message-ID: Subject: Re: [PATCH 2/2] pinctrl: renesas: rzg2l: Enable noise filter for GPIO interrupt input To: Biju Das Cc: Geert Uytterhoeven , Claudiu Beznea , Prabhakar Mahadev Lad , Marc Zyngier , "linux-kernel@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , "linux-gpio@vger.kernel.org" , Biju Das Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 20 Sep 2023 06:54:50 -0700 (PDT) On Wed, Sep 20, 2023 at 2:37=E2=80=AFPM Biju Das wrote: > 2) Digital Noise Filter Clock Selection Register (FILCLKSEL): > > The FILCLKSEL register selects the divided clock to be input to digital n= oise filters. > > 00b: Not divided (initial value) > 01b: Divided by 9000 (41.666 ns x 9000 =3D 375,000 ns) > 10b: Divided by 18000 (41.666 ns x 18000 =3D 750,000 ns) > 11b: Divided by 36000 (41.666 ns x 36000 =3D 1,500,000 ns) > Note: This value is the value when the external clock is 24MHz. > > Q1) What is the recommended way to associate the above values with > PIN_CONFIG_INPUT_DEBOUNCE? > > Eg: I need to configure filter on, 8 stage filter , a divisor of 18000 fo= r a mechanical button bounce noise. As per the generic pin config and DT bindings: * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode= , * which means it will wait for signals to settle when reading inputs.= The * argument gives the debounce time in usecs. Setting the * argument to zero turns debouncing off. input-debounce: $ref: /schemas/types.yaml#/definitions/uint32 description: Takes the debounce time in usec as argument or 0 to disabl= e debouncing The recommended way is to pass the desired clock cycle in microseconds as t= he argument to the pin config. Yours, Linus Walleij