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Date:   Wed, 20 Sep 2023 13:58:21 +0100
From:   Conor Dooley <conor@kernel.org>
To:     Inochi Amaoto <inochiama@outlook.com>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        aou@eecs.berkeley.edu, chao.wei@sophgo.com,
        evicetree@vger.kernel.org, emil.renner.berthing@canonical.com,
        guoren@kernel.org, jszhang@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
        linux-riscv@lists.infradead.org, palmer@dabbelt.com,
        paul.walmsley@sifive.com, robh+dt@kernel.org,
        xiaoguang.xing@sophgo.com, Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint
Message-ID: <20230920-8503c6365655d3ef3dadfd53@fedora>
References: <66b988f0-39fc-2ed3-8f38-151d6a3c9e52@linaro.org>
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On Wed, Sep 20, 2023 at 08:40:07PM +0800, Inochi Amaoto wrote:
> >On 20/09/2023 14:15, Inochi Amaoto wrote:
> >>> On 20/09/2023 08:39, Chen Wang wrote:
> >>>> From: Inochi Amaoto <inochiama@outlook.com>
> >>>>
> >>>> Add two new compatible string formatted like `C9xx-clint-xxx` to ide=
ntify
> >>>> the timer and ipi device separately, and do not allow c900-clint as =
the
> >>>
> >>> Why?
> >>>
> >>
> >> If use the same compatible, SBI will process this twice in both ipi and
> >> timer, use different compatible will allow SBI to treat these as diffe=
rent.
> >> AFAIK, the aclint in SBI use the same concepts, which make hard to use=
 the
> >> second register range. I have explained in another response.
> >
> >What is a SBI? Linux driver? If so, why some intermediate Linux driver
> >choice should affect bindings?
> >Best regards,
> >Krzysztof
> >
>=20
> SBI (Supervisor Binary Interface) is defined by riscv, which is an interf=
ace
> between the Supervisor Execution Environment (SEE) and the supervisor. The
> detailed documentation can be found in [1].
>=20
> The implement of SBI needs fdt info of the platform, which is provided by
> kernel. So we need a dt-bindings for these devices, and these will be
> processed by SBI.
>=20
> [1] https://github.com/riscv-non-isa/riscv-sbi-doc

Yeah, this is the unfortunate problem of half-baked bindings (IMO)
ending up in OpenSBI (which likely means they also ended up in QEMU).
This T-Head stuff is coming across our (metaphorical) desks, so we are
obviously going to try to do things correctly. I may end up speaking to
Anup later today, if I do I will point him at this thread (if he hasn't
seen it already).

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