Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5;
From:   Jeongtae Park <jtp.park@samsung.com>
To:     Dan Williams <dan.j.williams@intel.com>,
        Alison Schofield <alison.schofield@intel.com>,
        Vishal Verma <vishal.l.verma@intel.com>,
        Ben Widawsky <bwidawsk@kernel.org>,
        Jonathan Cameron <jonathan.cameron@huawei.com>,
        Dave Jiang <dave.jiang@intel.com>,
        Davidlohr Bueso <dave@stgolabs.net>,
        Fan Ni <fan.ni@samsung.com>, linux-cxl@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Kyungsan Kim <ks0204.kim@samsung.com>,
        Wonjae Lee <wj28.lee@samsung.com>,
        Hojin Nam <hj96.nam@samsung.com>,
        Junhyeok Im <junhyeok.im@samsung.com>,
        Jehoon Park <jehoon.park@samsung.com>,
        Jeongtae Park <jeongtae.park@gmail.com>,
        Jeongtae Park <jtp.park@samsung.com>
Subject: [PATCH 7/7] cxl/trace: Enclose a multiple statements macro in a do
 while loop
Date:   Thu, 21 Sep 2023 11:51:10 +0900
Message-Id: <20230921025110.3717583-8-jtp.park@samsung.com>
In-Reply-To: <20230921025110.3717583-1-jtp.park@samsung.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain; charset="utf-8"
CMS-TYPE: 102P
DLP-Filter: Pass
References: <20230921025110.3717583-1-jtp.park@samsung.com>
        <CGME20230921024832epcas2p35c4d3c20f7a70b023db64cd0db823eb8@epcas2p3.samsung.com>
Precedence: bulk

ERROR: Macros with complex values should be enclosed in parentheses

Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
---
 drivers/cxl/core/trace.h | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index 7aee7fb008a5..e2338773dcd6 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -199,17 +199,19 @@ TRACE_EVENT(cxl_overflow,
 	__field(u8, hdr_maint_op_class)
 
 #define CXL_EVT_TP_fast_assign(cxlmd, l, hdr)					\
-	__assign_str(memdev, dev_name(&(cxlmd)->dev));				\
-	__assign_str(host, dev_name((cxlmd)->dev.parent));			\
-	__entry->log = (l);							\
-	__entry->serial = (cxlmd)->cxlds->serial;				\
-	memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t));			\
-	__entry->hdr_length = (hdr).length;					\
-	__entry->hdr_flags = get_unaligned_le24((hdr).flags);			\
-	__entry->hdr_handle = le16_to_cpu((hdr).handle);			\
-	__entry->hdr_related_handle = le16_to_cpu((hdr).related_handle);	\
-	__entry->hdr_timestamp = le64_to_cpu((hdr).timestamp);			\
-	__entry->hdr_maint_op_class = (hdr).maint_op_class
+	do {									\
+	    __assign_str(memdev, dev_name(&(cxlmd)->dev));			\
+	    __assign_str(host, dev_name((cxlmd)->dev.parent));			\
+	    __entry->log = (l);							\
+	    __entry->serial = (cxlmd)->cxlds->serial;				\
+	    memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t));		\
+	    __entry->hdr_length = (hdr).length;					\
+	    __entry->hdr_flags = get_unaligned_le24((hdr).flags);		\
+	    __entry->hdr_handle = le16_to_cpu((hdr).handle);			\
+	    __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle);	\
+	    __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp);		\
+	    __entry->hdr_maint_op_class = (hdr).maint_op_class;			\
+	} while (0)
 
 #define CXL_EVT_TP_printk(fmt, ...) \
 	TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb "	\
-- 
2.34.1