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From:   Chen Wang <unicornxw@gmail.com>
Date:   Thu, 21 Sep 2023 18:27:09 +0800
Message-ID: <CAHAQgRDLmKJQ1sp76q4s7P4E_=nYuw199ceGCR0LYeq3331tLQ@mail.gmail.com>
Subject: Re: [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree
To:     Conor Dooley <conor@kernel.org>
Cc:     Conor Dooley <conor.dooley@microchip.com>, aou@eecs.berkeley.edu,
        chao.wei@sophgo.com, devicetree@vger.kernel.org,
        emil.renner.berthing@canonical.com, guoren@kernel.org,
        jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
        palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
        xiaoguang.xing@sophgo.com, Chen Wang <wangchen20@iscas.ac.cn>,
        Inochi Amaoto <inochiama@outlook.com>
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Regards,

unicornx

Conor Dooley <conor@kernel.org> =E4=BA=8E2023=E5=B9=B49=E6=9C=8821=E6=97=A5=
=E5=91=A8=E5=9B=9B 18:15=E5=86=99=E9=81=93=EF=BC=9A
>
> On Thu, Sep 21, 2023 at 05:56:28PM +0800, Chen Wang wrote:
> > Regards,
> >
> > unicornx
> >
......
> > > > +
> > > > +/ {
> > > > +     compatible =3D "sophgo,sg2042";
> > > > +     #address-cells =3D <2>;
> > > > +     #size-cells =3D <2>;
> > > > +     dma-noncoherent;
> > > > +
> > > > +     aliases {
> > > > +             serial0 =3D &uart0;
> > > > +     };
> > > > +
> > > > +     /* the mem node will be updated by ZSBL. */
> > >
> > > huh? So these are random numbers below? Either put something useful h=
ere
> > > or delete it please.
> >
> > The memory for SG2042 is not fixed, the bootloader will detect memory
> > installed on board during booting and fill the actual address and size
> > in the memory node. The comment " /* the mem node will be updated by
> > ZSBL. */" is telling this.
>
> Yes, I read the comment!
>
> > We write memory nodes like this to make them act just as placeholders
> > and the value is by default written as zero.
>
> Why knowingly add something that is wrong, rather than omitting them
> entirely?
>
> Thanks,
> Conor.
>

We learn this from arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts,
it writes DTS as following:

```
        memory@0 {
                device_type =3D "memory";
                /* rewrite this at bootloader */
                reg =3D <0x0 0x0 0x0 0x0>;
        };
```
So you mean we can totally remove the memory nodes in DTS and make
bootloader add it by itself? That sounds a good idea, I will have a
try. I used to think memory nodes are must-have in DTS.


> >
> >
> > >
> > > > +     memory@0 {
> > > > +             device_type =3D "memory";
> > > > +             reg =3D <0x00000000 0x00000000 0x00000000 0x00000000>=
;
> > > > +     };
> > > > +