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Thu, 21 Sep 2023 18:51:07 -0700 (PDT) From: Drew Fustini Subject: [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards Date: Thu, 21 Sep 2023 18:49:47 -0700 Message-Id: <20230921-th1520-mmc-v1-0-49f76c274fb3@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIALvyDGUC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDI2MDSyND3ZIMQ1MjA93c3GRdU0MLCwOzxERT00QLJaCGgqLUtMwKsGHRsbW 1AIE3bOtcAAAA To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Adrian Hunter , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley Cc: Robert Nelson , Jason Kridner , Xi Ruoyao , Han Gao , Icenowy Zheng , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Drew Fustini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1695347467; l=4409; i=dfustini@baylibre.com; s=20230430; h=from:subject:message-id; bh=TsJ18vOw1amlgVGcXat8klPQchAwNWl+YaMuYvHoF+4=; b=jzGQw+gp4aQ3WssWlcCJ1CI8Sw57dIEOlnAyzTpnSGcOZB8Lx3iKdYt+JyPlSiyQsOsVmJuKf AF4jEadFNIQDU2cggKSGH2Ca4Dk+nYeA71n5PgMAVwKOLUzbvLlKMtf X-Developer-Key: i=dfustini@baylibre.com; a=ed25519; pk=p3GKE9XFmjhwAayAHG4U108yag7V8xQVd4zJLdW0g7g= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Thu, 21 Sep 2023 18:51:26 -0700 (PDT) This series adds support for the eMMC on the BeagleV Ahead and the Sipeed LicheePi 4A. This allows the kernel to boot with the rootfs on eMMC. I tested on top of v6.6-rc2 with this config [1]. I was able to boot both the Ahead [2] and LPi4a [3] from eMMC. The following prerequisites are required: [PATCH v2] riscv: dts: thead: set dma-noncoherent to soc bus [4] I pushed a branch [5] with this patch series and the above patch for those that find a git branch easier to test. Please note that only the MMC controller connected to the eMMC device is enabled in the device trees for these two boards. I did not yet attempt to configure and use the microSD card slot. My preference is to address that in a future patch series. References: [1] https://gist.github.com/pdp7/5fbdcf2a65eb1abdd3a29d519c19cdd2 [2] https://gist.github.com/pdp7/91a801a5f8d1070c53509eda9800ad78 [3] https://gist.github.com/pdp7/1445c3c991e88fd69c60165cef65726a [4] https://lore.kernel.org/linux-riscv/20230912072232.2455-1-jszhang@kernel.org/ [5] https://github.com/pdp7/linux/tree/b4/th1520-mmc Changes since RFC v2: - ADMA mode now works correctly due to a patch from Jisheng on the list ("riscv: dts: thead: set dma-noncoherent to soc bus") and this commit from Icenowy that is now merged: 8eb8fe67e2c8 ("riscv: errata: fix T-Head dcache.cva encoding"). - Expose __sdhci_execute_tuning from sdhci.c so that it can be called from th1520_execute_tuning() - Refactor the define macros for all the PHY related registers to make it easier to understand the bit fields that the code is manipulating - Replace magic numbers in the PHY register writes with proper defines - Replace non_removable in dwcmshc_priv with check of mmc_host.caps - Drop dt prop "thead,io-fixed-1v8" and instead check for existing properties: "mmc-ddr-1_8v", "mmc-hs200-1_8v", or "mmc-hs400-1_8v" - Rename dt prop from "thead,pull-up" to "thead,phy-pull-up" and improve the description in the dt binding - Replace pull_up_en in dwcmshc_priv with bit field in new flags field - Create th1520_set_uhs_signaling() and call dwcmshc_set_uhs_signaling() from it instead of adding th1520 code to dwcmshc_set_uhs_signaling() - Return -EIO instead of -1 upon errors in th1520_execute_tuning() Changes in RFC v2: https://lore.kernel.org/linux-riscv/20230724-th1520-emmc-v2-0-132ed2e2171e@baylibre.com/ - Expand dwcmshc_priv based on driver in the T-Head 5.10 kernel: delay_line, non_removable, pull_up_en, io_fixed_1v8 - New boolean property "thead,pull-up" indicates phy pull-up config - New boolean property "thead,io-fixed-1v8" indicates that io voltage should be set to 1.8V during reset - Add th1520_phy_1_8v_init() as voltage_switch op - Add th1520_execute_tuning() as the platform_execute_tuning op - Added th1520_sdhci_reset() as the .reset op. This function will set io voltage to 1.8V after calling the standard sdhci_reset() function. - Modified dwcmshc_set_uhs_signaling() to enable SDHCI_CTRL_VDD_180 when io_fixed_1v8 is true - Add many defines for register offsets and settings based on the mmc support in the T-Head downstream v5.10 kernel RFC v1 series: https://lore.kernel.org/r/20230724-th1520-emmc-v1-0-cca1b2533da2@baylibre.com Signed-off-by: Drew Fustini --- Drew Fustini (6): dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support mmc: sdhci: add __sdhci_execute_tuning() to header mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520 riscv: dts: thead: Add TH1520 mmc controller and sdhci clock riscv: dts: thead: Enable BeagleV Ahead eMMC controller riscv: dts: thead: Enable LicheePi 4A eMMC controller .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 4 + arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 15 + .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 15 + arch/riscv/boot/dts/thead/th1520.dtsi | 15 + drivers/mmc/host/sdhci-of-dwcmshc.c | 456 +++++++++++++++++++++ drivers/mmc/host/sdhci.c | 2 +- drivers/mmc/host/sdhci.h | 1 + 7 files changed, 507 insertions(+), 1 deletion(-) --- base-commit: 3d01adbee80b2237c43e2e06d59e05aa243a0fe6 change-id: 20230921-th1520-mmc-518806aa55a8 Best regards, -- Drew Fustini