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[23.128.96.31]) by mx.google.com with ESMTPS id 191-20020a6300c8000000b0055c8f4a56d5si5279480pga.600.2023.09.23.01.13.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Sep 2023 01:13:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=hscrhA7w; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 9F84B8051943; Sat, 23 Sep 2023 01:10:38 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230185AbjIWIKc (ORCPT + 99 others); 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Sat, 23 Sep 2023 01:10:24 -0700 (PDT) X-Gm-Message-State: AOJu0YwW/OP8HWNiG6ZXczb1emGFaB1ZpRt4caznLBbEti6ndz7AespG BYHR/i3o1BdFk+HUxFFcpknMxaW+VE5r6KUNzpY= X-Received: by 2002:aa7:d4c5:0:b0:530:be79:49e7 with SMTP id t5-20020aa7d4c5000000b00530be7949e7mr1339748edr.37.1695456623284; Sat, 23 Sep 2023 01:10:23 -0700 (PDT) MIME-Version: 1.0 References: <20230921-th1520-mmc-v1-0-49f76c274fb3@baylibre.com> <20230921-th1520-mmc-v1-1-49f76c274fb3@baylibre.com> <20230922-parish-ice-a22e93dc3027@spud> In-Reply-To: From: Guo Ren Date: Sat, 23 Sep 2023 16:10:11 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/6] dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support To: Drew Fustini Cc: Conor Dooley , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Adrian Hunter , Fu Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou , Robert Nelson , Jason Kridner , Xi Ruoyao , Han Gao , Icenowy Zheng , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=2.4 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Sat, 23 Sep 2023 01:10:38 -0700 (PDT) X-Spam-Level: ** On Fri, Sep 22, 2023 at 11:18=E2=80=AFPM Drew Fustini wrote: > > On Fri, Sep 22, 2023 at 10:57:36AM +0100, Conor Dooley wrote: > > Hey Drew, > > > > On Thu, Sep 21, 2023 at 06:49:48PM -0700, Drew Fustini wrote: > > > Add compatible value for the T-Head TH1520 dwcmshc controller and add > > > thead,phy-pull-up property. > > > > > > Signed-off-by: Drew Fustini > > > --- > > > Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 4 ++= ++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci= .yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > > > index a43eb837f8da..46b768d46712 100644 > > > --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > > > +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > > > @@ -19,6 +19,7 @@ properties: > > > - rockchip,rk3568-dwcmshc > > > - rockchip,rk3588-dwcmshc > > > - snps,dwcmshc-sdhci > > > + - thead,th1520-dwcmshc > > > > > > reg: > > > maxItems: 1 > > > @@ -60,6 +61,9 @@ properties: > > > description: Specify the number of delay for tx sampling. > > > $ref: /schemas/types.yaml#/definitions/uint8 > > > > > > + thead,phy-pull-up: > > > + description: Enable weak pull-up on PHY pads > > > + type: boolean > > > > Why is the weak pull-up required? How would the dts author know if they > > need to use this property? > > This is a good question, and I don't have a good reason beyond it is > what the vendor SDK was doing. > > There are only two boards right now using the TH1520 that I know of. > Both the LPi4a [1] and the Ahead [2] have the pull-up property set on > all the mmc controller nodes their downstream device trees. > > Rob suggested on #devicetree that it would be simpler to just enable it > in the driver and disable support when needed. I like this idea as it > will simplify this binding patch and the code in the driver patch. It's for the PHY debug. You could directly remove them, or keep it with no-pull-up flag, then no pull-up flag in the dts for default.. static void sdhci_phy_1_8v_init_no_pull(struct sdhci_host *host) { uint32_t val; sdhci_writel(host, 1, DWC_MSHC_PTR_PHY_R); sdhci_writeb(host, 1 << 4, PHY_SDCLKDL_CNFG_R); sdhci_writeb(host, 0x40, PHY_SDCLKDL_DC_R); val =3D sdhci_readb(host, PHY_SDCLKDL_CNFG_R); val &=3D ~(1 << 4); sdhci_writeb(host, val, PHY_SDCLKDL_CNFG_R); val =3D sdhci_readw(host, PHY_CMDPAD_CNFG_R); sdhci_writew(host, val | 1, PHY_CMDPAD_CNFG_R); val =3D sdhci_readw(host, PHY_DATAPAD_CNFG_R); sdhci_writew(host, val | 1, PHY_DATAPAD_CNFG_R); val =3D sdhci_readw(host, PHY_RSTNPAD_CNFG_R); sdhci_writew(host, val | 1, PHY_RSTNPAD_CNFG_R); val =3D sdhci_readw(host, PHY_STBPAD_CNFG_R); sdhci_writew(host, val | 1, PHY_STBPAD_CNFG_R); val =3D sdhci_readb(host, PHY_DLL_CTRL_R); sdhci_writeb(host, val | 1, PHY_DLL_CTRL_R); } static void sdhci_phy_3_3v_init_no_pull(struct sdhci_host *host) { uint32_t val; sdhci_writel(host, 1, DWC_MSHC_PTR_PHY_R); sdhci_writeb(host, 1 << 4, PHY_SDCLKDL_CNFG_R); sdhci_writeb(host, 0x40, PHY_SDCLKDL_DC_R); val =3D sdhci_readb(host, PHY_SDCLKDL_CNFG_R); val &=3D ~(1 << 4); sdhci_writeb(host, val, PHY_SDCLKDL_CNFG_R); val =3D sdhci_readw(host, PHY_CMDPAD_CNFG_R); sdhci_writew(host, val | 2, PHY_CMDPAD_CNFG_R); val =3D sdhci_readw(host, PHY_DATAPAD_CNFG_R); sdhci_writew(host, val | 2, PHY_DATAPAD_CNFG_R); val =3D sdhci_readw(host, PHY_RSTNPAD_CNFG_R); sdhci_writew(host, val | 2, PHY_RSTNPAD_CNFG_R); val =3D sdhci_readw(host, PHY_STBPAD_CNFG_R); sdhci_writew(host, val | 2, PHY_STBPAD_CNFG_R); val =3D sdhci_readb(host, PHY_DLL_CTRL_R); sdhci_writeb(host, val | 1, PHY_DLL_CTRL_R); } > > Thanks, > Drew > > [1] https://git.beagleboard.org/beaglev-ahead/BeagleBoard-DeviceTrees/-/b= lob/v5.10.x-ti-unified/src/riscv/light-beagle-ref.dts > [2] https://github.com/revyos/thead-kernel/blob/lpi4a/arch/riscv/boot/dts= /thead/light-lpi4a-ref.dts --=20 Best Regards Guo Ren