Received: by 2002:a05:7412:2a8c:b0:e2:908c:2ebd with SMTP id u12csp176944rdh; Sat, 23 Sep 2023 06:15:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHdPGiL+mMOCc5rcBj7P0Cz+4Le9IlUR93PQypgzfLUtOR4UeSWqWe/DVdd4EnfHcvJdECs X-Received: by 2002:a17:903:32d1:b0:1c4:335:b06d with SMTP id i17-20020a17090332d100b001c40335b06dmr2211601plr.32.1695474952567; Sat, 23 Sep 2023 06:15:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695474952; cv=none; d=google.com; s=arc-20160816; b=derb3HF1AKZ21fCZNMYsNk9II1Hqoty8/3X3Nn5hdlfuh2QGsSAF9iUDP79LSmRdEj 6L4G8cAln4LL7KB+HkshTGU6cv7Ydr0Uf394zC78EE88+59bPlD0GDr0QEcj8KppFu2c LQdoaVUb8ZnWXOyL146vSigSsUMSkXzdsaqLrAnFW4cgLmPH/aAJxzEojO2Ms3bbGx3V 32cK9rQ2s8SGGpvxjXVoeo0Fcs2xP7B7TgNWItGs3mmxNiDE275CznftAfhIXQIluFgN ockmy6HPp9VYwzBBwFbqfgLvVj5k/WD2b5ldhMPbDuJwn7pOvqjCfBXgmtBtWiUf/B/Q e7ig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HhJim99jBrPG1triQAjIkjG+udEseNe8P5m/qf+Fd6M=; fh=Tb1p8S3iOxe/kX/WSNC3xEJzSVgGJ5DaxSrKb+pzH+4=; b=rj3YcA4Pgpb4aq9W+X0olOubxKLCheI4WklB7sPIEk9/PyCAgC8lLx1tDz5fT5DTHF z1wmdhnDXzBfCDANxVKvSiQpE1nkj08rnpHOAkD9iKkgslOhHqirEuVj3C9uXM6iQQQ/ 6OV87vrSa+cpK/FBrr4xO8yR/i7uWNP3pkUtZhJKHWXKnzGXD993eApjGzLiWnWLtsA3 ydFuadPK1ssQmUkGhliSPqBVxllAQ3hyM/SKkczw6sSU7HkLk5kQVWIgXeo3diDBEJGx 6Mk/o+v0KtGBjZ6aWmcP0ta1TKe0eAUjO6WEGTbSgQBK7XrbAlWdJe9ojZRklE+qjNnA cjtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lU3kY2b1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id j5-20020a170903024500b001bb8df95094si6417405plh.509.2023.09.23.06.15.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Sep 2023 06:15:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lU3kY2b1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 97E1482D28C1; Sat, 23 Sep 2023 03:12:53 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231708AbjIWKMd (ORCPT + 99 others); Sat, 23 Sep 2023 06:12:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231367AbjIWKLu (ORCPT ); Sat, 23 Sep 2023 06:11:50 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC4C51A5; Sat, 23 Sep 2023 03:11:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695463904; x=1726999904; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HpayuDP0G6ySf2KQMWwvFighiKo7ZJmuZuQ215k2l1g=; b=lU3kY2b1mloP/Llhpm5fhd7XanC1j8u/Mj+maRUbTQ+yfhC4Gji0a6BA 09GznR4PtexVP+NwOywvflZagIG0EtyWgzQUKeJ/LZB79H0dyV9OxapJP hBRl5q6Cq1LYngMRI4ZnKgbfwS7WT31jwvbhWjXs8u5XxaTr8Ndezomer d0WYeiHJTyJLgL64pKSEK++/IU+UeX8bHDiz3XVHYdaH0SFcJPeXAZ+MM vB5suDP+E6Ae6IU2boqB8tXIewFkymgAdODWtstsojuJoPJ/2WRdKCt/P u/3X/+/j9+6/07VypQH+qUYnG/4eDntJNsweH6tC6fj5xH+gY2A7MSWuR A==; X-IronPort-AV: E=McAfee;i="6600,9927,10841"; a="447492228" X-IronPort-AV: E=Sophos;i="6.03,171,1694761200"; d="scan'208";a="447492228" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Sep 2023 03:11:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10841"; a="813388144" X-IronPort-AV: E=Sophos;i="6.03,171,1694761200"; d="scan'208";a="813388144" Received: from unknown (HELO fred..) ([172.25.112.68]) by fmsmga008.fm.intel.com with ESMTP; 23 Sep 2023 03:11:42 -0700 From: Xin Li To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-hyperv@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, luto@kernel.org, pbonzini@redhat.com, seanjc@google.com, peterz@infradead.org, jgross@suse.com, ravi.v.shankar@intel.com, mhiramat@kernel.org, andrew.cooper3@citrix.com, jiangshanlai@gmail.com, nik.borisov@suse.com Subject: [PATCH v11 13/37] x86/cpu: Add X86_CR4_FRED macro Date: Sat, 23 Sep 2023 02:41:48 -0700 Message-Id: <20230923094212.26520-14-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230923094212.26520-1-xin3.li@intel.com> References: <20230923094212.26520-1-xin3.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=2.7 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sat, 23 Sep 2023 03:12:53 -0700 (PDT) X-Spam-Level: ** From: "H. Peter Anvin (Intel)" Add X86_CR4_FRED macro for the FRED bit in %cr4. This bit must not be changed after initialization, so add it to the pinned CR4 bits. Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Xin Li --- Changes since v9: * Avoid a type cast by defining X86_CR4_FRED as 0 on 32-bit (Thomas Gleixner). --- arch/x86/include/uapi/asm/processor-flags.h | 7 +++++++ arch/x86/kernel/cpu/common.c | 5 ++--- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h index d898432947ff..f1a4adc78272 100644 --- a/arch/x86/include/uapi/asm/processor-flags.h +++ b/arch/x86/include/uapi/asm/processor-flags.h @@ -139,6 +139,13 @@ #define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */ #define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT) +#ifdef __x86_64__ +#define X86_CR4_FRED_BIT 32 /* enable FRED kernel entry */ +#define X86_CR4_FRED _BITUL(X86_CR4_FRED_BIT) +#else +#define X86_CR4_FRED (0) +#endif + /* * x86-64 Task Priority Register, CR8 */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 4dec7822a291..20bbedbf6dcb 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -401,9 +401,8 @@ static __always_inline void setup_umip(struct cpuinfo_x86 *c) } /* These bits should not change their value after CPU init is finished. */ -static const unsigned long cr4_pinned_mask = - X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP | - X86_CR4_FSGSBASE | X86_CR4_CET; +static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP | + X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_FRED; static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning); static unsigned long cr4_pinned_bits __ro_after_init; -- 2.34.1