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Date:   Sun, 24 Sep 2023 22:07:34 +0800
From:   Shawn Guo <shawnguo@kernel.org>
To:     Richard Zhu <hongxing.zhu@nxp.com>
Cc:     s.hauer@pengutronix.de, festevam@gmail.com,
        marcel.ziswiler@toradex.com, Frank.Li@nxp.com,
        xiaoning.wang@nxp.com, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, kernel@pengutronix.de,
        linux-imx@nxp.com
Subject: Re: [PATCH v1] firmware: imx: scu-pd: Add missed PCIEA SATA0 and
 SERDES0 power domains
Message-ID: <20230924140734.GL7231@dragon>
References: <1692949635-27223-1-git-send-email-hongxing.zhu@nxp.com>
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On Fri, Aug 25, 2023 at 03:47:15PM +0800, Richard Zhu wrote:
> Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

It doesn't apply to v6.6-rc.  Could you rebase?

Shawn

> ---
>  drivers/firmware/imx/scu-pd.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
> index 84b673427073..7b8c2689b49c 100644
> --- a/drivers/firmware/imx/scu-pd.c
> +++ b/drivers/firmware/imx/scu-pd.c
> @@ -165,7 +165,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
>  	{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
>  
>  	/* HSIO SS */
> +	{ "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 },
>  	{ "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
> +	{ "sata-0", IMX_SC_R_SATA_0, 1, false, 0 },
> +	{ "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 },
>  	{ "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
>  	{ "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
>  
> -- 
> 2.34.1
>