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[82.149.12.148]) by smtp.gmail.com with ESMTPSA id s2-20020a170906354200b0098ec690e6d7sm5338376eja.73.2023.09.24.12.50.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Sep 2023 12:50:48 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Lee Jones , Chen-Yu Tsai , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andre Przywara Cc: Icenowy Zheng , Mark Brown , Samuel Holland , Shengyu Qu , Martin Botka , Matthew Croughan , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] dt-bindings: mfd: x-powers,axp152: make interrupt optional for more chips Date: Sun, 24 Sep 2023 21:50:46 +0200 Message-ID: <2900712.e9J7NaK4W3@jernej-laptop> In-Reply-To: <20230919103913.463156-2-andre.przywara@arm.com> References: <20230919103913.463156-1-andre.przywara@arm.com> <20230919103913.463156-2-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Sun, 24 Sep 2023 12:50:54 -0700 (PDT) Dne torek, 19. september 2023 ob 12:39:12 CEST je Andre Przywara napisal(a): > All X-Powers PMICs described by this binding have an IRQ pin, and so > far (almost) all boards connected this to some NMI pin or GPIO on the SoC > they are connected to. > However we start to see boards that omit this connection, and technically > the IRQ pin is not essential to the basic PMIC operation. > > The existing Linux driver allows skipping the IRQ pin setup for two chips > already, so update the binding to also make the DT property optional for > the missing chip. And while we are at it, add the AXP313a to that list, > as they are actually boards out there not connecting the IRQ pin. > > This allows to have DTs correctly describing those boards not wiring up > the interrupt. > > Signed-off-by: Andre Przywara > Acked-by: Conor Dooley Should I pick this patch through sunxi tree? Best regards, Jernej > --- > Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml > index 9ad55746133b5..06f1779835a1e 100644 > --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml > +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml > @@ -67,7 +67,10 @@ allOf: > properties: > compatible: > contains: > - const: x-powers,axp305 > + enum: > + - x-powers,axp15060 > + - x-powers,axp305 > + - x-powers,axp313a > > then: > required: >