Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) client-ip=23.128.96.34;
Message-ID: <6508a3ed-ac2e-c575-b152-0491b624e408@quicinc.com>
Date:   Mon, 25 Sep 2023 07:39:19 +0530
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.8.0
Subject: Re: [PATCH V3 4/4] arm64: dts: qcom: ipq5018: Add tsens node
Content-Language: en-US
To:     Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        Sricharan R <quic_srichara@quicinc.com>
CC:     <krzysztof.kozlowski@linaro.org>, <agross@kernel.org>,
        <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
        <srinivas.kandagatla@linaro.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <thara.gopinath@gmail.com>, <rafael@kernel.org>,
        <daniel.lezcano@linaro.org>, <linux-arm-msm@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-pm@vger.kernel.org>
References: <20230922115116.2748804-1-srichara@win-platform-upstream01.qualcomm.com>
 <20230922115116.2748804-5-srichara@win-platform-upstream01.qualcomm.com>
 <CAA8EJprMP5KW80Qfc6DQDhjsoHQzeXm9H4UiRPexQNqsPtUzbA@mail.gmail.com>
From:   Sricharan Ramabadhran <quic_srichara@quicinc.com>
In-Reply-To: <CAA8EJprMP5KW80Qfc6DQDhjsoHQzeXm9H4UiRPexQNqsPtUzbA@mail.gmail.com>
Content-Type: text/plain; charset="UTF-8"; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 9/24/2023 12:18 AM, Dmitry Baryshkov wrote:
> On Fri, 22 Sept 2023 at 14:51, Sricharan R
> <srichara@win-platform-upstream01.qualcomm.com> wrote:
>>
>> From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
>>
>> IPQ5018 has tsens V1.0 IP with 4 sensors.
>> There is no RPM, so tsens has to be manually enabled. Adding the tsens
>> and nvmem node and IPQ5018 has 4 thermal sensors (zones). With the
>> critical temperature being 120'C and action is to reboot. Adding all
>> the 4 zones here.
>>
>> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
>> ---
>>   [v3] Ordered the qfprom device node properties as per
>>        Krzysztof's comments
>>
>>   arch/arm64/boot/dts/qcom/ipq5018.dtsi | 169 ++++++++++++++++++++++++++
>>   1 file changed, 169 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> index 9f13d2dcdfd5..9e28b54ebcbd 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> @@ -93,6 +93,117 @@ soc: soc@0 {
>>                  #size-cells = <1>;
>>                  ranges = <0 0 0 0xffffffff>;
>>
>> +               qfprom: qfprom@a0000 {
>> +                       compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
>> +                       reg = <0xa0000 0x1000>;
>> +                       #address-cells = <1>;
>> +                       #size-cells = <1>;
>> +
>> +                       tsens_base1: base1@249 {
>> +                               reg = <0x249 2>;
>> +                               bits = <3 8>;
>> +                       };
>> +
>> +                       tsens_base2: base2@24a {
>> +                               reg = <0x24a 2>;
>> +                               bits = <3 8>;
>> +                       };
> 
> Sort by the address, please, as usual.
> 

  ok.

<..>

>>
>> +       thermal-zones {
>> +               ubi32-thermal {
>> +                       polling-delay-passive = <0>;
>> +                       polling-delay = <0>;
>> +                       thermal-sensors = <&tsens 1>;
>> +
>> +                       trips {
>> +                               ubi32-critical {
>> +                                       temperature = <120000>;
>> +                                       hysteresis = <2>;
>> +                                       type = "critical";
>> +                               };
>> +                       };
>> +               };
>> +
>> +               cpu-thermal {
> 
> 'c' < 'u'. Please sort the nodes here.

  ok

Regards,
  Sricharan