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[2620:137:e000::3:3]) by mx.google.com with ESMTPS id x6-20020a17090abc8600b0025027e0ad3dsi11379402pjr.81.2023.09.25.18.22.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 18:22:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) client-ip=2620:137:e000::3:3; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=AqdOnqS3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 0BBF780AE810; Mon, 25 Sep 2023 12:46:20 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233360AbjIYTqI (ORCPT + 99 others); Mon, 25 Sep 2023 15:46:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233314AbjIYTqG (ORCPT ); Mon, 25 Sep 2023 15:46:06 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F6AB103; Mon, 25 Sep 2023 12:46:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695671160; x=1727207160; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2v8jYLR4xvloEc3DBYqiOZSD43EbqJMRtEb7xJauReg=; b=AqdOnqS3PkRMvDlmcJiUAO/R3UdC7OC6sH2ypiBYC7w2FenjLIuMR+uV fUyjMBHb7CkvgapZDfVXh5feYJD45DP7FtDDx7yEuduFFKqh52p+Cb7dO uSmO46TwUqZ9Wg2YmL4o4G+v4d7uqZqF697XuHaEX/kFhBsebXxw3kMWr 1EUzRuk+6S+9R+lRiBTus0Ue2jTT2l8OcQxNwhyvyDiKRBlb4G3VUIA5c ThC0nw7ASnFSqFOU//+nFKX+QJmSGvwu5eyX4suFHmAQSFO0mC+X6znB6 3S1p/apP86KUSw4PrcSldRRaGl09wra9uk7a2eNjLdEUI2lXwJmEKhl6e w==; X-IronPort-AV: E=McAfee;i="6600,9927,10843"; a="380233034" X-IronPort-AV: E=Sophos;i="6.03,176,1694761200"; d="scan'208";a="380233034" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2023 12:45:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10843"; a="814114295" X-IronPort-AV: E=Sophos;i="6.03,176,1694761200"; d="scan'208";a="814114295" Received: from spandruv-desk.jf.intel.com ([10.54.75.14]) by fmsmga008.fm.intel.com with ESMTP; 25 Sep 2023 12:45:56 -0700 From: Srinivas Pandruvada To: hdegoede@redhat.com, markgross@kernel.org, ilpo.jarvinen@linux.intel.com, andriy.shevchenko@linux.intel.com Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Pandruvada Subject: [PATCH 1/3] platform/x86: ISST: Use fuse enabled mask instead of allowed levels Date: Mon, 25 Sep 2023 12:45:53 -0700 Message-Id: <20230925194555.966743-2-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230925194555.966743-1-srinivas.pandruvada@linux.intel.com> References: <20230925194555.966743-1-srinivas.pandruvada@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 25 Sep 2023 12:46:20 -0700 (PDT) Allowed level mask is a mask of levels, which are currently allowed to dynamically switch. But even dynamic switching is not allowed, user should be able to check all parameters for selection via BIOS. So when passing the level mask for display to user space, use fuse enabled mask, which has all levels. Signed-off-by: Srinivas Pandruvada --- drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index 37f17e229419..48465636aadb 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -712,7 +712,7 @@ static int isst_if_get_perf_level(void __user *argp) return -EINVAL; perf_level.max_level = power_domain_info->max_level; - perf_level.level_mask = power_domain_info->pp_header.allowed_level_mask; + perf_level.level_mask = power_domain_info->pp_header.level_en_mask; perf_level.feature_rev = power_domain_info->pp_header.feature_rev; _read_pp_info("current_level", perf_level.current_level, SST_PP_STATUS_OFFSET, SST_PP_LEVEL_START, SST_PP_LEVEL_WIDTH, SST_MUL_FACTOR_NONE) -- 2.41.0