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Message-ID: <e3c4013eca1b7cb6edd6724be37e2ec86fc408dd.camel@codeconstruct.com.au>
Subject: Re: [PATCH] pinctrl: pinctrl-aspeed-g6: Add more settings for
 USB2AHP function
From:   Andrew Jeffery <andrew@codeconstruct.com.au>
To:     Linus Walleij <linus.walleij@linaro.org>,
        Joe Wang <joe_wang@aspeedtech.com>
Cc:     linux-aspeed@lists.ozlabs.org, andrew@aj.id.au,
        openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org,
        linux-gpio@vger.kernel.org, joel@jms.id.au,
        linux-arm-kernel@lists.infradead.org
Date:   Tue, 26 Sep 2023 10:46:54 +0930
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References: <20230920103332.274151-1-joe_wang@aspeedtech.com>
         <CACRpkdaZb+V-Zx_Uw9MCqRqE+N-0gd__xEFV3BTpkG7icU9W+A@mail.gmail.com>
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On Mon, 2023-09-25 at 15:15 +0200, Linus Walleij wrote:
> On Wed, Sep 20, 2023 at 12:33=E2=80=AFPM Joe Wang <joe_wang@aspeedtech.co=
m> wrote:
>=20
> > AST2600 USB2AHP (USB PortA: PCIe EHCI to PHY) function needs to set the
> > register SCUC20[16]. Set it to enable the PCIe EHCI device on PCIe bus.
> > Besides, also add USB2AHP signal expressions into pin declarations.
> >=20
> > Signed-off-by: Joe Wang <joe_wang@aspeedtech.com>
>=20
> Patch applied!

Thanks. I hope to improve my review responsiveness for Aspeed patches
over recent times.

Andrew