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From:   Mark Brown <broonie@kernel.org>
To:     shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com,
        nicoleotsuka@gmail.com, lgirdwood@gmail.com, perex@perex.cz,
        tiwai@suse.com, alsa-devel@alsa-project.org,
        linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
        matuszpd@gmail.com, Shengjiu Wang <shengjiu.wang@nxp.com>
In-Reply-To: <1695116533-23287-1-git-send-email-shengjiu.wang@nxp.com>
References: <1695116533-23287-1-git-send-email-shengjiu.wang@nxp.com>
Subject: Re: [PATCH] ASoC: fsl_sai: Don't disable bitclock for i.MX8MP
Message-Id: <169571570223.2520438.2470473456796299214.b4-ty@kernel.org>
Date:   Tue, 26 Sep 2023 10:08:22 +0200
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On Tue, 19 Sep 2023 17:42:13 +0800, Shengjiu Wang wrote:
> On i.MX8MP, the BCE and TERE bit are binding with mclk
> enablement, if BCE and TERE are cleared the MCLK also be
> disabled on output pin, that cause the external codec (wm8960)
> in wrong state.
> 
> Codec (wm8960) is using the mclk to generate PLL clock,
> if mclk is disabled before disabling PLL, the codec (wm8960)
> won't generate bclk and frameclk when sysclk switch to
> MCLK source in next test case.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: fsl_sai: Don't disable bitclock for i.MX8MP
      commit: 197c53c8ecb34f2cd5922f4bdcffa8f701a134eb

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark