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Tue, 26 Sep 2023 05:45:14 -0700 (PDT) Sender: Guenter Roeck Date: Tue, 26 Sep 2023 05:45:13 -0700 From: Guenter Roeck To: Darren Hart Cc: linux-kernel@vger.kernel.org, Vanshidhar Konda , Wim Van Sebroeck , linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Subject: Re: [PATCH] sbsa_gwdt: Calculate timeout with 64-bit math Message-ID: References: <7d1713c5ffab19b0f3de796d82df19e8b1f340de.1695286124.git.darren@os.amperecomputing.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7d1713c5ffab19b0f3de796d82df19e8b1f340de.1695286124.git.darren@os.amperecomputing.com> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 26 Sep 2023 05:45:28 -0700 (PDT) On Thu, Sep 21, 2023 at 02:02:36AM -0700, Darren Hart wrote: > Commit abd3ac7902fb ("watchdog: sbsa: Support architecture version 1") > introduced new timer math for watchdog revision 1 with the 48 bit offset > register. > > The gwdt->clk and timeout are u32, but the argument being calculated is > u64. Without a cast, the compiler performs u32 operations, truncating > intermediate steps, resulting in incorrect values. > > A watchdog revision 1 implementation with a gwdt->clk of 1GHz and a > timeout of 600s writes 3647256576 to the one shot watchdog instead of > 300000000000, resulting in the watchdog firing in 3.6s instead of 600s. > > Force u64 math by casting the first argument (gwdt->clk) as a u64. Make > the order of operations explicit with parenthesis. > > Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1") > Reported-by: Vanshidhar Konda > Signed-off-by: Darren Hart > Cc: Wim Van Sebroeck > Cc: Guenter Roeck > Cc: linux-watchdog@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: # 5.14.x Reviewed-by: Guenter Roeck > --- > drivers/watchdog/sbsa_gwdt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c > index fd3cfdda4949..76527324b63c 100644 > --- a/drivers/watchdog/sbsa_gwdt.c > +++ b/drivers/watchdog/sbsa_gwdt.c > @@ -153,14 +153,14 @@ static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd, > timeout = clamp_t(unsigned int, timeout, 1, wdd->max_hw_heartbeat_ms / 1000); > > if (action) > - sbsa_gwdt_reg_write(gwdt->clk * timeout, gwdt); > + sbsa_gwdt_reg_write((u64)gwdt->clk * timeout, gwdt); > else > /* > * In the single stage mode, The first signal (WS0) is ignored, > * the timeout is (WOR * 2), so the WOR should be configured > * to half value of timeout. > */ > - sbsa_gwdt_reg_write(gwdt->clk / 2 * timeout, gwdt); > + sbsa_gwdt_reg_write(((u64)gwdt->clk / 2) * timeout, gwdt); > > return 0; > } > -- > 2.41.0 >