Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32;
Message-ID: <db0135bb-6548-07f8-2707-ec13a7aae8b6@linux.intel.com>
Date:   Tue, 26 Sep 2023 12:35:09 -0400
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101
 Thunderbird/102.15.1
Subject: Re: [RFC PATCH 22/25] perf stat: Add TSC support in hardware-grouping
Content-Language: en-US
To:     weilin.wang@intel.com, Ian Rogers <irogers@google.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        Adrian Hunter <adrian.hunter@intel.com>
Cc:     linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
        Perry Taylor <perry.taylor@intel.com>,
        Samantha Alt <samantha.alt@intel.com>,
        Caleb Biggers <caleb.biggers@intel.com>,
        Mark Rutland <mark.rutland@arm.com>
References: <20230925061824.3818631-1-weilin.wang@intel.com>
 <20230925061824.3818631-23-weilin.wang@intel.com>
From:   "Liang, Kan" <kan.liang@linux.intel.com>
In-Reply-To: <20230925061824.3818631-23-weilin.wang@intel.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 2023-09-25 2:18 a.m., weilin.wang@intel.com wrote:
> From: Weilin Wang <weilin.wang@intel.com>
> 
> Add TSC check and create new event for it the same way as how we handle
> topdown-* for now since it is not listed in an event json file either. Need
> TSC to support TopdownL4-L5.
> 
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
>  tools/perf/util/metricgroup.c | 21 ++++++++++++++++++---
>  1 file changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index d10f6afb0..07a82fa21 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -321,6 +321,14 @@ static int setup_metric_events(const char *pmu, struct hashmap *ids,
>  		}
>  	}
>  	if (matched_events < ids_size) {
> +		struct hashmap_entry *cur;
> +		size_t bkt;
> +
> +		hashmap__for_each_entry(ids, cur, bkt) {
> +			const char *id = cur->pkey;
> +
> +			pr_debug("Need event %s\n", id);
> +		}

Is it just for the debug purpose?
If so, please only traverse the hashmap in debug.

>  		free(metric_events);
>  		return -EINVAL;
>  	}
> @@ -2106,11 +2114,16 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx,
>  #define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
>  	hashmap__for_each_entry(ctx->ids, cur, bkt) {
>  		const char *id = cur->pkey;
> -		const char *special_pattern = "topdown-";
> +		const char *pattern1 = "topdown-";
> +		const char *pattern2 = "TSC";
>  
>  		pr_debug("found event %s\n", id);
> -		if (!strncmp(id, special_pattern, strlen(special_pattern))) {
> +		if (!strncmp(id, pattern1, strlen(pattern1)) ||
> +		    !strncmp(id, pattern2, strlen(pattern2))) {

I guess there may be more patterns later. It's better to add a dedicated
function to the check.

Thanks,
Kan

>  			struct metricgroup__event_info *event;
> +			/* topdown-* and TSC use dedicated registers, set as free
> +			 * counter here for grouping
> +			 */
>  			event = event_info__new(id, "default_core", "0", false,
>  						/*free_counter=*/true);
>  			if (!event) {
> @@ -2602,8 +2615,10 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
>  		ret = hw_aware_parse_groups(perf_evlist, pmu, str,
>  			    metric_no_threshold, user_requested_cpu_list, system_wide,
>  			    /*fake_pmu=*/NULL, metric_events, table);
> -		if (!ret)
> +		if (!ret) {
> +			pr_info("Hardware aware grouping completed\n");
>  			return 0;
> +		}
>  	}
>  
>  	return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,