Received: by 2002:a05:7412:2a8c:b0:e2:908c:2ebd with SMTP id u12csp2473470rdh; Wed, 27 Sep 2023 03:57:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHs99BWRdkdKc3ldGabBh64sAMvWmnAgdeP1SMPbD6zbbmso5RzLBIOxMZzi5519XhNNwTl X-Received: by 2002:a17:902:c402:b0:1b0:3ab6:5140 with SMTP id k2-20020a170902c40200b001b03ab65140mr3337268plk.4.1695812241415; Wed, 27 Sep 2023 03:57:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695812241; cv=none; d=google.com; s=arc-20160816; b=kIb8lyHG2pglnewjkvmt8sSaB7fGNyo/gSQ7D8QtSEkixqptiKDFuraKlm+CEhrg5j D94sk62k+tdI+A2S1YjOpofssVNN9oPoQbbH1zzY5ToeI7efHMOTGANw7Wh0wMwQ6QtX 0GVkqNr9wh7wXUTl0gRi+OxzlGHB28//LTVTJf27hndtHs1QcChaIv8VWq0tERRF+qdP nNuOMdQ0xqfXHGYDKPZCF7YZfHi4kpg9f4lREs2sby64U6AMXRW69yVWyZbo7cY/RP62 9oQspohB9EvW6RHqi3ScEWU6g3bCUMhqPGSbTb3o6P8rJBGcst+98h6G/na8t5Aq6faT D5eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:subject:user-agent:mime-version:date:message-id; bh=XupkHrmJD9kINY7dm3S82lHjnqGuwtG5kN4hHnWT0nQ=; fh=i6a/uCijDaCPmfor37WxXxDxSZvWuWiUEVOB4iXHFHs=; b=ii4519hEasfGwbgMbE23xnNNRszMk6xv7xuVlkvSUEGOO4DvKRR3TU+3Qf/Totw0VJ uSiBlEtmuSUDKwjBSqfFj49H7I9OSBeG95l5MJVHeN29l23JwrP9baqBkGUC71bcmh4Z kWLjvNrrkfqoCYQlM/1lGPvcYMGVL5qfAKEl7zFoGBWV/idF4DYnpUysFCsS9nL/d0Bf /DiWpyP/p6WfDqDE8fyIUH6nUTI6nFIsjqYkxAsPtsDtFgaq+TMuBBYn6Gb3j4jrOvB4 YJ/kPJYMq7F+7nKRLtbsxyijhR3kXpac72N7RBHfTZVZv5wSOCcng+OcKGaKX55h2igM BVaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Return-Path: Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id q3-20020a170902dac300b001b82a4d3ea7si16595310plx.249.2023.09.27.03.57.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Sep 2023 03:57:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id B6F868020846; Wed, 27 Sep 2023 02:16:12 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230372AbjI0JPl (ORCPT + 99 others); Wed, 27 Sep 2023 05:15:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230146AbjI0JPf (ORCPT ); Wed, 27 Sep 2023 05:15:35 -0400 Received: from out30-124.freemail.mail.aliyun.com (out30-124.freemail.mail.aliyun.com [115.124.30.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5149B92; Wed, 27 Sep 2023 02:15:32 -0700 (PDT) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R191e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046059;MF=baolin.wang@linux.alibaba.com;NM=1;PH=DS;RN=10;SR=0;TI=SMTPD_---0VszroM3_1695806129; Received: from 30.97.48.70(mailfrom:baolin.wang@linux.alibaba.com fp:SMTPD_---0VszroM3_1695806129) by smtp.aliyun-inc.com; Wed, 27 Sep 2023 17:15:29 +0800 Message-ID: <106d5134-6829-5a25-f1b1-37e5fe20a617@linux.alibaba.com> Date: Wed, 27 Sep 2023 17:15:36 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH V2 2/4] gpio: sprd: Clear interrupt after set the interrupt type To: Wenhua Lin , Linus Walleij , Andy Shevchenko , Bartosz Golaszewski Cc: Orson Zhai , Chunyan Zhang , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, wenhua lin , Xiongpeng Wu References: <20230921090027.11136-1-Wenhua.Lin@unisoc.com> <20230921090027.11136-3-Wenhua.Lin@unisoc.com> From: Baolin Wang In-Reply-To: <20230921090027.11136-3-Wenhua.Lin@unisoc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 27 Sep 2023 02:16:12 -0700 (PDT) On 9/21/2023 5:00 PM, Wenhua Lin wrote: > The initialization state of the EIC module is a high level trigger. > If it is currently a high level, the interrupt condition is met at > this time, and the EIC interrupt has a latch capability, which will > cause an interrupt to occur after booting. To avoid this, When setting > the EIC interrupt trigger type, clear the interrupt once. With Andy's comments, Reviewed-by: Baolin Wang > Signed-off-by: Wenhua Lin > --- > drivers/gpio/gpio-eic-sprd.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c > index bfa8a4c7515a..96f1c7fd3988 100644 > --- a/drivers/gpio/gpio-eic-sprd.c > +++ b/drivers/gpio/gpio-eic-sprd.c > @@ -375,29 +375,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1); > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_edge_irq); > break; > case IRQ_TYPE_EDGE_FALLING: > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0); > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_edge_irq); > break; > case IRQ_TYPE_EDGE_BOTH: > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1); > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_edge_irq); > break; > case IRQ_TYPE_LEVEL_HIGH: > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1); > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_level_irq); > break; > case IRQ_TYPE_LEVEL_LOW: > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1); > sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0); > + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_level_irq); > break; > default: > @@ -410,29 +415,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1); > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_edge_irq); > break; > case IRQ_TYPE_EDGE_FALLING: > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0); > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_edge_irq); > break; > case IRQ_TYPE_EDGE_BOTH: > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1); > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_edge_irq); > break; > case IRQ_TYPE_LEVEL_HIGH: > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1); > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_level_irq); > break; > case IRQ_TYPE_LEVEL_LOW: > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1); > sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0); > + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); > irq_set_handler_locked(data, handle_level_irq); > break; > default: